CMOS image sensor with sigma-delta type analog-to-digital conversion

Patent metadata

Field	Value
Publication number	US-9553124-B2
Application number	US-201514939852-A
Country	US
Kind code	B2
Filing date	Nov 12, 2015
Priority date	Nov 13, 2014
Publication date	Jan 24, 2017
Grant date	Jan 24, 2017

Abstract

A CMOS image sensor including a plurality of pixels, each including: a photodiode; a sigma-delta modulator of order p, p being an integer greater than or equal to 1, capable of delivering a binary digital signal representative of the illumination level of the photodiode; and a configurable connection circuit enabling to couple the sigma-delta modulator of the pixel to a sigma-delta modulator of another pixel, so that the modulators of the two pixels form with each other a sigma-delta modulator of order greater than p.

First claim

What is claimed is:

1. A CMOS image sensor comprising a plurality of pixels, each comprising:
a photodiode;
a sigma-delta modulator of order p, p being an integer greater than or equal to 1, capable of delivering a binary digital signal representative of an illumination level of the photodiode; and
a configurable connection circuit enabling to couple the sigma-delta modulator of a first pixel of the plurality of pixels to a sigma-delta modulator of another pixel of the plurality of pixels, so that the modulators of the first and second pixels form with each other a sigma-delta modulator of order greater than p.

2. The sensor of claim 1 , wherein the pixels are distributed in groups of q pixels, q being an integer greater than or equal to 2, the pixels of a same group being interconnected and circuits for connecting the pixels of a same group being capable of being configured to couple the modulators of order p of the pixels in the group so that the modulators form together a sigma-delta modulator of order q*p.

3. The sensor of claim 1 , wherein in each pixel, the sigma-delta modulator of order p of the pixel comprises an analog integrator comprising the photodiode of the pixel.

4. The sensor of claim 3 , wherein, in each pixel, the sigma-delta modulator of order p comprises an analog-to-digital converter of an analog output signal of the analog integrator of the pixel.

5. The sensor of claim 4 , wherein, in each pixel, the analog-to-digital converter comprises a comparator comparing said output signal with a reference signal.

6. The sensor of claim 4 , wherein, in each pixel, the sigma-delta modulator of order p comprises a feed-back circuit connecting an output node of the analog-to-digital converter to a node of the analog integrator of the pixel.

7. The sensor of claim 6 , wherein, in each pixel, the feedback circuit is capable of injecting a predetermined quantity of charges into the analog integrator of the pixel.

8. The sensor of claim 7 , wherein said charges have a sign opposite to that of photogenerated charges stored in the photodiode of the pixel.

9. The sensor of claim 6 , wherein, in each pixel, the feedback circuit comprises first, second, and third P-channel MOS transistors series-connected between the node of the analog integrator of the pixel, and a node of application of a first control signal.

10. The sensor of claim 9 , wherein, in each pixel, a control gates of the second and third P-channel MOS transistors are respectively coupled to first and second bias potentials.

11. The sensor of claim 9 , wherein, in each pixel, a control gate of the first P-channel MOS transistor is coupled to a node of application of a second control signal and to said output node of the analog-to-digital converter via a logic gate.

12. The sensor of claim 3 , wherein, in each pixel, a connection circuit is capable of injecting, onto a node of the analog integrator of the pixel, a quantity of charges representative of an output signal of the analog integrator of another pixel of the sensor.

13. The sensor of claim 12 , wherein, in each pixel, the a connection circuit comprises first, second, and third N-channel MOS transistors series-connected between the output node of the analog integrator of the pixel and a node of application of a third control signal.

14. The sensor of claim 13 , wherein, in each pixel, a control gates of the second and third N-channel MOS transistors are respectively coupled to a third bias potential and to a node of an analog integrator of another pixel of the sensor.

Assignees

• Commissariat L Energie Atomique Et Aux Energies Alternatives
• Commissariat Energie Atomique

Inventors

• Verdant Arnaud

Classifications

• H03M3/394 Primary

  among different orders of the loop filter · CPC title

• H04N25/772

  comprising A/D, V/T, V/F, I/T or I/F converters · CPC title

• H01L27/14636

  Electricity · mapped topic

• H03M3/458

  Analogue/digital converters using delta-sigma modulation as an intermediate step · CPC title

• H04N5/37455

  Electricity · mapped topic