High electron mobility transistor and method for forming the same
US-12176414-B2 · Dec 24, 2024 · US
US9553060B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9553060-B2 |
| Application number | US-201615072148-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 16, 2016 |
| Priority date | Apr 10, 2015 |
| Publication date | Jan 24, 2017 |
| Grant date | Jan 24, 2017 |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
Provided are a semiconductor device and a manufacturing method therefor that can prevent electric short-circuiting between redistribution lines. A barrier film is formed over each side surface of a copper redistribution line. The barrier film includes, for example, a manganese oxide film. The barrier film is also in contact with each end surface of a barrier metal film that is located in the position receding inward from the side surface of the copper redistribution line. A redistribution portion is formed by the copper redistribution line, the barrier film, and the barrier metal film.
Opening claim text (preview).
What is claimed is: 1. A semiconductor device, comprising: a semiconductor substrate having a main surface; a multi-layer wiring that includes wirings respectively formed over the main surface of the semiconductor substrate and having different heights from the main surface; a passivation film formed to cover an uppermost-layer wiring disposed in a highest position from the main surface in the multi-layer wiring, the passivation film having an opening communicating with the uppermost-layer wiring; a redistribution portion including a redistribution line formed to be in contact with a part of the uppermost-layer wiring positioned in the opening, the redistribution line having a side surface and an upper surface; a pad portion formed to be in contact with the upper surface of the redistribution line; and a resin film formed to cover the redistribution portion, wherein the redistribution portion includes a barrier film formed to be in contact with the side surface of the redistribution line, the barrier film containing a metal oxide film, and wherein the pad portion includes a pad metal film made of material different from that for the barrier film. 2. The semiconductor device according to claim 1 , wherein the metal oxide film of the barrier film contains any one selected from the group comprised of a manganese (Mn) oxide film, a titanium (Ti) oxide film, and an aluminum (Al) oxide film. 3. The semiconductor device according to claim 1 , wherein in the redistribution portion, a thickness of a part of the barrier film formed at a lower end side of the side surface of the redistribution line is larger than a thickness of a part of the barrier film formed at an upper end side of the side surface. 4. The semiconductor device according to claim 1 , wherein the barrier film includes any one of laminated films selected from the group comprised of a laminated film of a manganese (Mn) film and a manganese (Mn) oxide film as the metal oxide film, a laminated film of a titanium (Ti) film and a titanium (Ti) oxide film as the metal oxide film, and a laminated film of an aluminum (Al) film and an aluminum (Al) oxide film as the metal oxide film. 5. The semiconductor device according to claim 1 , wherein the redistribution portion includes a first barrier metal film formed to be in contact with a part of the uppermost-layer wiring positioned in the opening, wherein the redistribution line is formed to be in contact with the first barrier metal film with the first barrier metal film intervening between the uppermost-layer wiring and the redistribution line, and wherein the barrier film is formed to be in contact with an end surface of the first barrier metal film. 6. The semiconductor device according to claim 5 , wherein the first barrier metal film includes at least one of a chromium (Cr) film and a first titanium (Ti) film. 7. The semiconductor device according to claim 1 , wherein the pad portion includes a second barrier metal film formed to be in contact with the upper surface of the redistribution line, and wherein the pad metal film is formed to be in contact with the second barrier metal film with the second barrier metal film intervening between the redistribution line and the pad metal film. 8. The semiconductor device according to claim 7 , wherein the second barrier metal film is a nickel (Ni) film, and wherein the pad metal film is a gold (Au) film. 9. The semiconductor device according to claim 7 , wherein the second barrier metal film is a second titanium (Ti) film, and wherein the pad metal film is a palladium (Pd) film. 10. The semiconductor device according to claim 1 , wherein the redistribution line is formed of a copper film, wherein the uppermost-layer wiring is formed of an aluminum film, and wherein a thickness of the redistribution line is larger than that of the uppermost-layer wiring. 11. A method for manufacturing a semiconductor device, comprising the steps of: forming a multi-layer wiring over a main surface of a semiconductor substrate, which has the main surface, the multi-layer wiring including wirings having different heights from the main surface; forming a passivation film to cover an uppermost-layer wiring disposed in a highest position from the main surface in the multi-layer wiring; forming, in the passivation film, an opening for exposing the uppermost-layer wiring; forming a redistribution portion to be in contact with the uppermost-layer wiring exposed from the opening, the redistribution portion including a redistribution line with a side surface and an upper surface; and forming a pad portion to be in contact with the upper surface of the redistribution line, wherein the step of forming the redistribution portion comprises the steps of: forming a metal film containing at least a first metal at the side surface of the redistribution line except for a surface of the passivation film and the upper surface of the redistribution line; and forming a barrier film that contains a first metal oxide film formed through oxidation of the first metal by applying heat treatment to the metal film, and wherein the step of forming the pad portion comprises the step of: forming a pad metal film from material different from that for the barrier film. 12. The method for manufacturing a semiconductor device according to claim 11 , wherein the step of forming the metal film comprises the step of: depositing, as the metal film, the first metal and a second metal different from the first metal over the side surface of the redistribution line by etching while depositing the first metal and the second metal at the surface of the passivation film, and wherein the metal film is deposited under a condition in which an amount of deposition of the first metal and the second metal at the surface of the passivation film is substantially the same as an amount of etching of the first metal and second metal deposited. 13. The method for manufacturing a semiconductor device according to claim 12 , wherein in the step of forming the metal film, any one of metals selected from the group comprised of manganese (Mn), titanium (Ti), and aluminum (Al) is used as the first metal, and wherein copper (Cu) is used as the second metal. 14. The method for manufacturing a semiconductor device according to claim 11 , wherein the step of forming the metal film comprises the step of: depositing, as the metal film, the first metal and a second metal different from the first metal over the side surface of the redistribution line by etching while depositing the first metal and the second metal at the surface of the passivation film, and wherein the metal film is deposited under a condition in which an amount of deposition of the first metal and the second metal at the surface of the passivation film differs from an amount of etching of the first metal and second metal deposited. 15. The method for manufacturing a semiconductor device according to claim 11 , wherein the step of forming the metal film comprises the steps of: forming a first metal film from the first metal to cover the passivation film and the redistribution line; and removing parts of the first metal film respectively positioned over the upper surface of the redistribution line and the surface of the passivation film while leaving a part of the first metal film positioned at the side surface of the redistribution line by etching the first metal film. 16. The method for manufacturing a semiconductor device according to claim 15 , wherein in the step of forming the metal film, any one se
relative to the surface, e.g. recessed, protruding · CPC title
with redistribution layers [RDL] · CPC title
comprising copper [Cu] · CPC title
Changing the shapes of bond pads · CPC title
in gaseous form, e.g. by CVD or PVD · CPC title
Related publications grouped by family.
Answers are generated from the same data shown on this page.