Semiconductor device, having conductive pattern and electronic apparatus

Patent metadata

Field	Value
Publication number	US-9552996-B2
Application number	US-201514790178-A
Country	US
Kind code	B2
Filing date	Jul 2, 2015
Priority date	Jul 10, 2014
Publication date	Jan 24, 2017
Grant date	Jan 24, 2017

Abstract

There is provided a conductive pattern forming method that can suppress shape abnormalities caused by the reattachment of a neodymium component. A conductive pattern forming method according to an aspect of the invention includes forming an aluminum-neodymium alloy film on a base material; forming, on the aluminum-neodymium alloy film, a conductive film having a thickness greater than or equal to ¼ times the thickness of the aluminum-neodymium alloy film; and patterning the aluminum-neodymium alloy film and the conductive film by using dry etching.

First claim

What is claimed is:

1. A semiconductor device comprising a first gate electrode formed by using a forming method including:
forming an aluminum-neodymium alloy film on a base material;
forming, on the aluminum-neodymium alloy film, a conductive film having a thickness greater than or equal to ¼ times a thickness of the aluminum-neodymium alloy film; and
patterning the aluminum-neodymium alloy film and the conductive film by using dry etching,
a gap between the first gate electrode and a second gate electrode that is provided adjacent to the first gate electrode being 10 μm or less.

2. An electronic apparatus comprising the semiconductor device according to claim 1 .

3. A semiconductor device comprising:
a first gate electrode including
an aluminum-neodymium alloy film, and
a conductive film that is laminated on the aluminum-neodymium alloy film and has a thickness greater than or equal to ¼ times a thickness of the aluminum-neodymium alloy film;

an insulating film that is provided on the first gate electrode; and
a wiring that is provided on the insulating film,
a gap between the first gate electrode and a second gate electrode that is provided adjacent to the first gate electrode being 10 μm or less.

4. The semiconductor device according to claim 3 ,
wherein the first gate electrode constitutes at least one of a gate line and a source line.

5. The semiconductor device according to claim 3 ,
wherein the aluminum-neodymium alloy film is formed on a barrier film, and
the barrier film contains titanium.

6. An electronic apparatus comprising the semiconductor device according to claim 3 .

7. A semiconductor device comprising:
a first wiring including
an aluminum-neodymium alloy film, and
a conductive film that is laminated on the aluminum-neodymium alloy film and has a thickness greater than or equal to ¼ times a thickness of the aluminum-neodymium alloy film;

an insulating film that is provided on the first wiring; and
a pixel electrode that is provided on the insulating film,
a gap between the first wiring and a second wiring that is provided adjacent to the first wiring being 10 μm or less.

Assignees

• Seiko Epson Corp

Inventors

• Sera Hiroshi

Classifications

• H10P50/267

  using plasmas · CPC title

• H10W20/4407 Primary

  Aluminium alloys · CPC title

• H10W20/425

  Barrier, adhesion or liner layers · CPC title

• H10W20/4403

  based on metals, e.g. alloys, metal silicides (H10W20/4484 takes precedence) · CPC title

• H10P50/266 Primary

  by vapour etching only · CPC title