Semiconductor memory device including non-volatile memory, cache memory, and computer system

Patent metadata

Field	Value
Publication number	US-9552256-B2
Application number	US-201514978538-A
Country	US
Kind code	B2
Filing date	Dec 22, 2015
Priority date	Nov 27, 2012
Publication date	Jan 24, 2017
Grant date	Jan 24, 2017

Abstract

In one embodiment, the memory device includes a data storage region and an error correction (ECC) region. The data storage region configured to store a first number of data blocks. The ECC region is configured to store a second number of ECC blocks. Each of the second number of ECC blocks is configured to store ECC information. The second number of the ECC blocks is associated with the first number of data blocks, and the second number is less than the first number.

First claim

We claim:

1. A method of reading data, comprising:
receiving a request to read data from one of a first number of data blocks;
scanning an ECC region containing a second number of ECC blocks for block identification information indicating whether any of the second number of ECC blocks correspond to the requested data block; and
if one of the second number of ECC blocks is associated with the requested data block,
determining from the block identification information which one of Hall the second number of ECC blocks is associated with the requested data block, the second number being less than the first number;
simultaneously reading the requested data block and an ECC parity from the associated ECC block; and
selectively performing error correction on the read data block using the requested data block and the ECC parity associated with the ECC block based on whether one of the ECC blocks is associated with the requested data block.

2. The method of claim 1 , wherein each of the ECC blocks is associated with one of the data blocks such that at least one of the data blocks does not have an associated ECC block.

3. The method of claim 1 , wherein the block information indicates which one of the second number of ECC blocks corresponds to the first number of data blocks.

4. The method of claim 1 , further comprising:
storing the block identification information in different ones of a plurality of memory cell arrays.

5. A method of storing data, comprising:
receiving a request to write received data to a selected one of a first number of data blocks;
determining if an invalid error correction (ECC) block in a second number of ECC blocks exists in response to the request, the second number of ECC blocks being associated with the first number of data blocks; and
if the invalid ECC block does not exist,
removing errors from data in another of the first number of data blocks such that no errors in reading the another data block exist;
invalidating the ECC block associated with the another data block;
writing the received data in the selected data block;
writing ECC data associated with the received data into the invalidated ECC block; and
changing a state of the invalidated ECC block to valid.

6. The method of claim 5 , wherein the second number is less than the first number.

7. The method of claim 5 , wherein the changing stores validity information in association with the invalidated ECC block.

8. The method of claim 7 , wherein the timing information is a count value, and the storing timing information includes changing the count value associated with other valid ECC blocks.

9. The method of claim 8 , wherein the removing removes errors from one of the first number of data blocks associated with one of the ECC block having a highest count value.

10. The method of claim 7 , wherein the removing removes errors from a one of the first number of data blocks corresponding to an oldest ECC block as indicated by the timing information.

11. The method of claim 5 , wherein if the invalid ECC block does not exist, further comprising:
storing block identification information in association with the valid ECC block, the block identification information indicating to which of the first number of data blocks the valid ECC block corresponds.

12. The method of claim 11 , wherein if the invalid ECC block does not exist, further comprising:
storing timing information in association with the valid ECC block, the timing information indicating an age of an associated one of the ECC blocks relative to others of the ECC blocks.

13. The method of claim 5 , wherein the removing randomly selects the another data block.

14. The method of claim 5 , wherein if the invalid ECC block does exist,
writing the received data to the selected data block;
writing ECC data associated with the received data to an invalid one of the ECC blocks;
determining if the written data includes errors; and
invalidating the ECC block in which the ECC data was written if the determining determines that the written data does not include errors.

15. The method of claim 14 , wherein if the determining determines the written data does include errors,
determining if the errors are not correctable by the ECC data; and
correcting at least one of the errors in the written data if the errors are determined not to be correctable.

16. The method of claim 15 , further comprising:
validating the ECC block if the errors are determined to be correctable.

17. A method of storing data, comprising:
receiving a request to write received data to a selected one of a first number of data blocks;
writing the received data to the selected data block;
writing ECC data associated with the received data to one of a second number of ECC blocks;
determining if the written data includes errors that are not correctable by the ECC data;
if the written data includes errors that are correctable by the ECC data,
completing the writing of the received data to the selected data block, and
maintaining a respective ECC block of the second number of ECC blocks in a valid state; and

if the written data includes errors that are not correctable by the ECC data,
rewriting the received data and an ECC parity corresponding to the respective ECC block,
performing a read-verify operation after the rewrite, and
changing the valid state of the respective ECC block to an invalid state, if the read-verify operation indicates that the rewriting has corrected the errors in the written data.

18. The method of claim 17 , wherein the second number is less than the first number.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Kim Sun-Gyeum
• Kwon Hyeok-Man
• Kwon Young-Jun
• Choi Ki-Young
• Ahn Jun-Whan

Classifications

• G11C29/52

  Protection of memory contents; Detection of errors in memory contents · CPC title

• G06F11/1064 Primary

  in cache or content addressable memories · CPC title

• G11C11/1677

  Verifying circuits or methods · CPC title

• G06F11/1068 Primary

  in sector programmable memories, e.g. flash disk (G06F11/1072 takes precedence) · CPC title

• G11C11/1653

  Address circuits or decoders · CPC title