Backplane testing system

Patent metadata

Field	Value
Publication number	US-9551746-B2
Application number	US-201514644867-A
Country	US
Kind code	B2
Filing date	Mar 11, 2015
Priority date	Mar 11, 2015
Publication date	Jan 24, 2017
Grant date	Jan 24, 2017

Abstract

A backplane testing system includes a test backplane coupled to a test device chassis and including a first connector system, a second connector system, and channels that connect the first connector system and the second connector system. A first test device in a first test device slot on the test device chassis engages the first connector system and provides a loop back circuit for the first connector system. A second test device in a second test device slot on the test device chassis engages the second connector system. The second test device sends a test signal through a channel on the test backplane such that the test signal is provided to the loop back circuit on the first test device and received back through the channel. The second test device analyzes the test signal that is received to determine a testing compliance of the channel on the test backplane.

First claim

What is claimed is:

1. A backplane testing system, comprising:
a test device chassis that defines a plurality of test device slots;
a test backplane that is coupled to the test device chassis adjacent the plurality of test device slots, wherein the test backplane includes a first connector system, a second connector system, and a plurality of channels that connect the first connector system and the second connector system;
a first test device that is located in a first test device slot of the plurality of test device slots and that engages the first connector system on the test backplane, wherein the first test device provides a loop back circuit for the first connector system; and
a second test device that is located in a second test device slot of the plurality of test device slots and that engages the second connector system on the test backplane, wherein the second test device is configured to send a test signal through at least one of the plurality of channels on the test backplane such that the test signal is provided to the loop back circuit on the first test device and received back through the at least one of the plurality of channels the test backplane, and wherein the second test device is configured to analyze the test signal that is received to determine a testing compliance of the at least one of the plurality of channels on the test backplane.

2. The backplane testing system of claim 1 , wherein the test backplane is a networking device backplane, the first connector system is a line module connector system, and the second connector system is a route processing module connector system.

3. The backplane testing system of claim 2 , wherein the first test device engages the line module connector system that is configured to connect two line modules to the test backplane.

4. The backplane testing system of claim 1 , wherein the first test device engages a transmitter connection and a receiver connection on the first connector system to connect the transmitter connection and the receiver connection to the loop back circuit.

5. The backplane testing system of claim 1 , further comprising:
an analyzer system on the second test device that is configured to create the test signal that includes a pseudorandom binary sequence (PRBS) test pattern, and analyze a received PRBS test pattern in the test signal that is received to determine the testing compliance of the at least one of the plurality of channels on the test backplane.

6. The backplane testing system of claim 1 , further comprising:
a testing system that is coupled to the second test device, wherein the testing system is configured to determine eye details of the test signal that is received.

7. The backplane testing system of claim 1 , wherein the testing compliance of the at least one of the plurality of channels on the test backplane is a speed testing compliance of the at least one of the plurality of channels on the test backplane.

8. A networking device backplane testing system, comprising:
a line module loop back test device that is configured to engage a line module connector system on a test backplane, wherein the line module loop back test device provides a loop back circuit for the line module connector system; and
a route processing module test device that is configured to engage a route processing module connector system on the test backplane, wherein the route processing module test device is configured to send a test signal through at least one of a plurality of channels on the test backplane such that the test signal is provided to the loop back circuit on the line module loop back test device and received back through the at least one of the plurality of channels the test backplane, and wherein the route processing module test device is configured to analyze the test signal that is received to determine a testing compliance of the at least one of the plurality of channels on the test backplane.

9. The networking device backplane testing system of claim 8 , further comprising:
a test device chassis that is configured to couple to the test backplane, wherein the test device chassis defines at least one line module loop back test device slot that is configured to house the line module loop back test device when the line module loop back test device engages the line module connector system on the test backplane, and wherein the test device chassis defines at least one route processing module test device slot that is configured to house the route processing module test device when the route processing module test device engages the route processing module connector system on the test backplane.

10. The networking device backplane testing system of claim 8 , wherein the line module loop back test device engages the line module connector system that is configured to connect two line modules to the test backplane.

11. The networking device backplane testing system of claim 8 , wherein the line module loop back test device engages a transmitter connection and a receiver connection on the line module connector system to connect the transmitter connection and the receiver connection to the loop back circuit.

12. The networking device backplane testing system of claim 8 , further comprising:
an analyzer system on the route processing module test device that is configured to create the test signal that includes a pseudorandom binary sequence (PRBS) test pattern, and analyze a received PRBS test pattern in the test signal that is received to determine the testing compliance of the at least one of the plurality of channels on the test backplane.

13. The backplane testing system of claim 1 , wherein the testing compliance of the at least one of the plurality of channels on the test backplane is a speed testing compliance of the at least one of the plurality of channels on the test backplane.

14. A method for testing a backplane, comprising:
coupling a test backplane to a test device chassis adjacent a plurality of test device slots that are defined by the test device chassis, wherein the test backplane includes a first connector system, a second connector system, and a plurality of channels that connect the first connector system and the second connector system;
positioning a first test device a first test device slot of the plurality of test device slots such that the first test device engages the first connector system on the test backplane, wherein the first test device provides a loop back circuit for the first connector system;
positioning a second test device in a second test device slot of the plurality of test device slots such that the second test device engages the second connector system on the test backplane;
sending a test signal from the second test device through at least one of the plurality of channels on the test backplane such that the test signal is provided to the loop back circuit on the first test device and received back through the at least one of the plurality of channels the test backplane at the second test device; and
analyzing the test signal that is received to determine a testing compliance of the at least one of the plurality of channels on the test backplane.

15. The method of claim 14 , wherein the test backplane is a networking device backplane, the first connector system is a line module connector system, and the second connector system is a route processing module connector system.

16. The method of claim 15 , wherein the first test device engages the line module connector system that is configured to connect two line modules to the test backplane.

17. The method of cla

Assignees

• Dell Products Lp

Inventors

• Chandra Umesh
• Mai Timothy Thinh

Classifications

• G01R31/31703 Primary

  Comparison aspects, e.g. signature analysis, comparators (concerning scan tests G01R31/318566; concerning testers G01R31/3193) · CPC title

• G01R31/31716

  Testing of input or output with loop-back · CPC title

• G01R31/31813

  Test pattern generators · CPC title

• G01R31/31712

  Input or output aspects · CPC title

• G01R31/31708

  Analysis of signal quality (G01R31/31901 takes precedence; measuring frequencies or analysing frequency spectra per se G01R23/00; measuring non-linear distortion per se G01R23/20) · CPC title