Synchronizing system, synchronizing method, first synchronizing device, second synchronizing device, and computer program

US9548831B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9548831-B2
Application numberUS-201214002520-A
CountryUS
Kind codeB2
Filing dateMar 2, 2012
Priority dateMar 3, 2011
Publication dateJan 17, 2017
Grant dateJan 17, 2017

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  1. Title

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  2. Abstract

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  5. First independent claim

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Provided is a synchronization system comprising a first synchronization device and a second synchronization device which carry out synchronization processing by transmitting and receiving synchronization packets in accordance with a synchronization protocol and which synchronize the times thereof. The first synchronization device, which corresponds to a slave device, notifies an abnormality to the second synchronization device when an abnormality related to time synchronization processing is detected. The second synchronization device, which corresponds to a master device, increases the interval during which synchronization is performed as the length of time during which an abnormality notification is not received increases.

First claim

Opening claim text (preview).

The invention claimed is: 1. A synchronizing system including a first synchronizing device and a second synchronizing device that transmit or receive a synchronous packet according to a synchronous protocol, perform a synchronization process, and synchronize a time with each other, the system comprising: a clock generator which generates a clock signal, the first synchronizing device including a transceiving circuit structured to transmit or receive the synchronous packet to or from the second synchronizing device, a synchronization control circuit structured to acquire a difference between a time of the first synchronizing device and a time of the second synchronizing device based on the synchronous packet, a time-managing circuit structured to count the time of the first synchronizing device in synchronization with the clock signal and correct the time of the first synchronizing device to be equal to the time of the second synchronizing device based on the difference, and an abnormality notification circuit structured to notify the second synchronizing device of an abnormality when a status in which the clock signal extracted from a signal of a physical layer received from the communication path between the clock generator and the first synchronizing device has deteriorated is detected, the second synchronizing device including a transceiving circuit structured to transmit or receive the synchronous packet to or from the first synchronizing device, a synchronization interval control circuit structured to increase an interval at which the synchronization process is performed as the length of time increases, during which the second synchronizing device is not notified of the abnormality, a synchronization control circuit structured to perform the synchronization process at the interval determined by the synchronization interval control circuit, and the second synchronizing device operating in synchronization with the clock signal. 2. The synchronizing system according to claim 1 , wherein, when the abnormality is notified of, the synchronization interval control circuit causes a synchronization interval until a next synchronization process to be smaller than a synchronization interval at that point in time. 3. The synchronizing system according to claim 1 , wherein, when the abnormality is notified of, the synchronization control circuit immediately performs the synchronization process regardless of the interval determined by the synchronization interval control circuit. 4. A synchronizing method performed by a synchronizing system including a first synchronizing device and a second synchronizing device that transmit or receive a synchronous packet according to a synchronous protocol, perform a synchronization process, and synchronize a time with each other, the method comprising: a generating step of generating a clock signal by a clock generator; a transceiving step of transmitting or receiving, by the first synchronizing device, the synchronous packet to or from the second synchronizing device; a synchronization control step of acquiring, by the first synchronizing device, a difference between a time of the first synchronizing device and a time of the second synchronizing device based on the synchronous packet; a time-managing step of counting, by the first synchronizing device, the time of the first synchronizing device in synchronization with the clock signal, and correcting, by the first synchronizing device, the time of the first synchronizing device to be equal to the time of the second synchronizing device based on the difference; an abnormality notification step of notifying, by the first synchronizing device, the second synchronizing device of an abnormality when a status in which the clock signal extracted from a signal of a physical layer received from the communication path between the clock generator and the first synchronizing device has deteriorated is detected; a transceiving step of transmitting or receiving, by the second synchronizing device which operates in synchronization with the clock signal, the synchronous packet to or from the first synchronizing device; a synchronization interval control step of increasing, by the second synchronizing device which operates in synchronization with the clock signal, an interval at which the synchronization process is performed as the length of time increases, during which the second synchronizing device is not notified of the abnormality; and a synchronization control step of performing, by the second synchronizing device which operates in synchronization with the clock signal, the synchronization process at the interval determined by the synchronization interval control step. 5. A first synchronizing device of a synchronizing system including a clock generator, the first synchronizing device and a second synchronizing device, wherein the clock generator generates a clock signal, the first and second synchronizing devices transmit or receive a synchronous packet according to a synchronous protocol, perform a synchronization process, and synchronize a time with each other, and the second synchronizing device operates in synchronization with the clock signal, the first synchronizing device comprising: a transceiving circuit structured to transmit or receive the synchronous packet to or from the second synchronizing device that increases an interval at which the synchronization process is performed as the length of time during which abnormality is not notified of increases; a synchronization control circuit structured to acquire a difference between a time of the first synchronizing device and a time of the second synchronizing device based on the synchronous packet; a time-managing circuit structured to count the time of the first synchronizing device in synchronization with the clock signal and correct the time of the first synchronizing device to be equal to the time of the second synchronizing device based on the difference; and an abnormality notification circuit structured to notify the second synchronizing device of an abnormality when a status in which the clock signal extracted from a signal of a physical layer received from the communication path between the clock generator and the first synchronizing device has deteriorated is detected. 6. A second synchronizing device of a synchronizing system including a clock generator, a first synchronizing device and the second synchronizing device, wherein the clock generator generates a clock signal, and the first and second synchronizing devices transmit or receive a synchronous packet according to a synchronous protocol, perform a synchronization process, and synchronize a time with each other, the second synchronizing device comprising: a transceiving circuit structured to transmit or receive the synchronous packet to or from the first synchronizing device that notifies the second synchronizing device of an abnormality when a status in which the clock signal extracted from a signal of a physical layer received from the communication path between the clock generator and the first synchronizing device has deteriorated is detected; a synchronization interval control circuit structured to increase an interval at which the synchronization process is performed as the length of time increases, during which the second synchronizing device is not notified of the abnormality from the first synchronizing device; a synchronization control circuit structured to perform the synchronization process at the interval determined by the synchronization interval control circuit; and the second synchronizing device operating in synchronization with the clock signal. 7. A non-transitory computer-readable recording medium in which a computer program is recorded, t

Assignees

Inventors

Classifications

  • H04J3/0667Primary

    Bidirectional timestamps, e.g. NTP or PTP for compensation of clock drift and for compensation of propagation delays (arrangements for monitoring round trip delays in packet switching networks H04L43/0864) · CPC title

  • Monitoring arrangements {(for SDH/SONET rings H04J3/085)} · CPC title

  • H04J3/0638Primary

    Clock or time synchronisation among nodes; Internode synchronisation (synchronization for ring networks H04L12/422; data switching networks with synchronous transmission H04L12/43) · CPC title

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What does patent US9548831B2 cover?
Provided is a synchronization system comprising a first synchronization device and a second synchronization device which carry out synchronization processing by transmitting and receiving synchronization packets in accordance with a synchronization protocol and which synchronize the times thereof. The first synchronization device, which corresponds to a slave device, notifies an abnormality to …
Who is the assignee on this patent?
Kamada Shinya, Nec Corp
What technology area does this patent fall under?
Primary CPC classification H04J3/0667. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jan 17 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).