Frequency specific closed loop feedback control of integrated circuits

US9548725B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9548725-B2
Application numberUS-201314091255-A
CountryUS
Kind codeB2
Filing dateNov 26, 2013
Priority dateApr 16, 2002
Publication dateJan 17, 2017
Grant dateJan 17, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Systems and methods for frequency specific closed loop feedback control of integrated circuits. In one embodiment, a plurality of controllable inputs to an integrated circuit is adjusted to achieve a frequency specific predetermined value of a dynamic operating indicator of the integrated circuit at the desired specific operating frequency. The predetermined value is stored in a data structure within a computer usable media. The data structure comprises a plurality of frequency specific predetermined values for a variety of operating frequencies. An operating condition of an integrated circuit is controlled via closed loop feedback based on dynamic operating indicators of the measured behavior of the integrated circuit.

First claim

Opening claim text (preview).

What is claimed is: 1. A method of operating an integrated circuit, the method comprising: accessing a predetermined value for an operating characteristic of the integrated circuit, wherein the predetermined value correlates to a level of power consumption at an operating frequency of the integrated circuit; determining a current value for the operating characteristic of the integrated circuit; and adjusting a voltage level supplied to the integrated circuit to cause the current value of the operating characteristic to approach the predetermined value and a power consumption of the integrated circuit to approach the level of power consumption. 2. The method of claim 1 , further comprising periodically repeating said determining and said adjusting. 3. The method of claim 1 , wherein the voltage level supplied to the integrated circuit comprises a body bias voltage applied to a semiconductor device of the integrated circuit. 4. The method of claim 1 , wherein the operating frequency is selected according to the level of power consumption. 5. The method of claim 4 , further comprising storing the predetermined value in a computer-usable medium. 6. The method of claim 5 , wherein the predetermined value is stored in a data structure that comprises multiple predetermined values, each predetermined value associated with a different operating frequency. 7. The method of claim 1 , wherein the predetermined value is at least one of a gate delay of the integrated circuit, an off current of the integrated circuit, a gate leakage of the integrated circuit, a temperature, a number of oscillations of a ring oscillator per unit time, or a measure of relative behavior of semiconductor devices of the integrated circuit. 8. The method of claim 1 , further comprising combining predetermined values for different operating characteristics of the integrated circuit to generate the predetermined value. 9. A system, comprising: a first circuit component operable to access a predetermined value for an operating characteristic of an integrated circuit, wherein the predetermined value correlates to a level of power consumption at an operating frequency of the integrated circuit; and a second circuit component operable to provide a measured value of the operating characteristic to the first circuit component; wherein the first circuit component is further operable to adjust a voltage level supplied to the integrated circuit to cause the measured value to approach the predetermined value and a power consumption of the integrated circuit to approach the level of power consumption. 10. The system of claim 9 , further comprising: a computer-usable medium for storing the predetermined value in a data structure associated with the operating frequency. 11. The system of claim 10 , wherein the data structure comprises a plurality of predetermined values, each predetermined value associated with a different operating frequency. 12. The system of claim 9 , wherein the voltage level supplied to the integrated circuit comprises a body bias voltage applied to a semiconductor device of the integrated circuit. 13. The system of claim 9 , wherein the predetermined value is at least one of a gate delay of the aid integrated circuit, an off current of the integrated circuit, a gate leakage of the integrated circuit, a temperature, a number of oscillations of a ring oscillator per unit time, or a measure of relative behavior of semiconductor devices of the integrated circuit. 14. An apparatus, comprising: an integrated circuit; and memory coupled to the integrated circuit and operable to store a predetermined value for an operating characteristic of the integrated circuit, wherein the predetermined value correlates to a level of power consumption at an operating frequency of the integrated circuit; wherein the integrated circuit is further operable to determine a current value for the operating characteristic of the integrated circuit and to adjust a voltage level supplied to the integrated circuit to cause the current value of the operating characteristic to approach the predetermined value and a power consumption of the integrated circuit to approach the level of power consumption. 15. The apparatus of claim 14 , wherein the voltage level supplied to the integrated circuit comprises a body bias voltage applied to a semiconductor device of the integrated circuit. 16. The apparatus of claim 14 , wherein the operating frequency is selected according to the level of power consumption. 17. The apparatus of claim 14 , wherein the predetermined value is at least one of a gate delay of the integrated circuit, an off current of the integrated circuit, a gate leakage of the integrated circuit, a temperature, a number of oscillations of a ring oscillator per unit time, or a measure of relative behavior of semiconductor devices of the integrated circuit. 18. The apparatus of claim 14 , further operable to execute a function that combines predetermined values for different operating characteristics of the integrated circuit to generate the predetermined value. 19. The apparatus of claim 14 , wherein the level of power consumption corresponds to a lowest level of power consumption achievable for the integrated circuit while operating properly at the operating frequency. 20. The apparatus of claim 14 , wherein the operating frequency corresponds to a greatest operating frequency achievable for the integrated circuit while operating properly at the voltage level supplied to the integrated circuit.

Assignees

Inventors

Classifications

  • by lowering the supply or operating voltage · CPC title

  • G05B13/021Primary

    in which a variable is automatically adjusted to optimise the performance · CPC title

  • by lowering clock frequency · CPC title

  • Ring oscillators · CPC title

  • for testing field effect transistors, i.e. FET's · CPC title

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What does patent US9548725B2 cover?
Systems and methods for frequency specific closed loop feedback control of integrated circuits. In one embodiment, a plurality of controllable inputs to an integrated circuit is adjusted to achieve a frequency specific predetermined value of a dynamic operating indicator of the integrated circuit at the desired specific operating frequency. The predetermined value is stored in a data structure …
Who is the assignee on this patent?
Intellectual Ventures Holding 81 Llc
What technology area does this patent fall under?
Primary CPC classification G05B13/021. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jan 17 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).