Semiconductor device including ion gel material and electronic device including the semiconductor device

Patent metadata

Field	Value
Publication number	US-9548368-B2
Application number	US-201514712041-A
Country	US
Kind code	B2
Filing date	May 14, 2015
Priority date	Jun 12, 2014
Publication date	Jan 17, 2017
Grant date	Jan 17, 2017

Abstract

A semiconductor device, a method for manufacturing the same, and an electronic device including the same are provided. The semiconductor device includes a first transistor and a second transistor. The first transistor includes a first channel layer and a first ion gel. The second transistor includes a second channel layer and a second ion gel. The first channel layer and the second channel layer may include, for example, graphene. The first ion gel and the second ion gel include different ionic liquids. The first ion gel and the second ion gel include different cations and/or different anions. One of the first transistor and the second transistor is a p-type transistor, and the other one is an n-type transistor. The combination of the first transistor and the second transistor constitutes an inverter.

First claim

What is claimed is:

1. A semiconductor device comprising a first transistor and a second transistor that is connected to the first transistor,
wherein the first transistor comprises a first channel layer and a first gate insulating layer, the first channel layer comprising graphene, and the first gate insulating layer comprising a first ion gel,
wherein the second transistor comprises a second channel layer and a second gate insulating layer, the second channel layer comprising graphene, and the second gate insulating layer comprising a second ion gel which is different from the first ion gel, and
wherein the first ion gel comprises at least one from among a first cation and a first anion, and wherein the second ion gel comprises at least one from among a second cation which is different from the first cation and a second anion which is different from the first anion.

2. The semiconductor device of claim 1 , wherein the first ion gel comprises the first cation and the first anion, and wherein the second ion gel comprises the first cation and the second anion which is different from the first anion.

3. The semiconductor device of claim 1 , wherein the first ion gel comprises the first anion and the first cation, and wherein the second ion gel comprises the first anion and the second cation which is different from the first cation.

4. The semiconductor device of claim 1 , wherein at least one from among the first ion gel and the second ion gel comprises at least one cation selected from among 1-Ethyl-3-methylimidazolium (EMIM), 1-Methyl-3-methylimidazolium (DMIM), 1-Propyl-3-methylimidazolium (PMIM), 1-Butyl-1-methylpyrrolidinium (BMPyr), and 1-Butyl-3-methylpyridinium (BMPy), and wherein at least one from among the first ion gel and the second ion gel comprises at least one anion selected from among thiocyanate (SCN), dicyanamide (DCA), tetrafluoroborate (BF4), trifluoromethanesulfonate (OTF), and bi(trifluoromethanesulfonyl)imide (NTf2).

5. A semiconductor device comprising a first transistor and a second transistor that is connected to the first transistor,
wherein the first transistor comprises a first channel layer and a first gate insulating layer, the first channel layer comprising graphene, and the first gate insulating layer comprising a first ion gel,
wherein the second transistor comprises a second channel layer and a second gate insulating layer, the second channel layer comprising graphene, and the second gate insulating layer comprising a second ion gel which is different from the first ion gel, and
wherein the first channel layer has a first Dirac point, and the second channel layer have a second Dirac point which is different from the first Dirac point due to a material difference between the first ion gel and the second ion gel.

6. The semiconductor device of claim 1 , wherein a first one from among the first transistor and the second transistor has a p-type transistor characteristic within a first voltage range, and a second one from among the first transistor and the second transistor has an n-type transistor characteristic within the first voltage range.

7. The semiconductor device of claim 1 , wherein a combination of the first transistor and the second transistor constitutes a complementary inverter.

8. The semiconductor device of claim 1 , wherein the semiconductor device includes at least one from among a flexible device and a stretchable device.

9. The semiconductor device of claim 1 , wherein at least one from among the first transistor and the second transistor has a top-gate structure.

10. The semiconductor device of claim 1 , wherein at least one from among the first transistor and the second transistor has a bottom-gate structure.

11. The semiconductor device of claim 1 , wherein at least one from among the first transistor and the second transistor has a side-gate structure.

12. An electronic device comprising the semiconductor device of claim 1 .

13. The electronic device of claim 12 , wherein the electronic device includes one from among a NAND device, a NOR device, an encoder, a decoder, a multiplexer (MUX), a de-multiplexer (DEMUX), a sense amplifier, an oscillator, and a static random access memory (SRAM).

14. A semiconductor device comprising a first transistor and a second transistor that is connected to the first transistor,
wherein the first transistor comprises a first channel layer and a first ion gel layer that is in contact with the first channel layer,
wherein the second transistor comprises a second channel layer and a second ion gel layer that is in contact with the second channel layer, and
wherein the first ion gel layer comprises a first material, and the second ion gel layer comprises a second material that is different from the first material, and the first transistor has at least one characteristic that is different from a corresponding characteristic of the second transistor due to a material difference between the first ion gel layer and the second ion gel layer.

15. The semiconductor device of claim 14 , wherein the first channel layer and the second channel layer are formed of a same material.

16. The semiconductor device of claim 14 , wherein each of the first channel layer and the second channel layer comprises graphene.

17. The semiconductor device of claim 14 , wherein the first ion gel layer comprises at least one from among a first cation and a first anion, and wherein the second ion gel comprises at least one from among a second cation which is different from the first cation and a second anion which is different from the first anion.

18. The semiconductor device of claim 14 , wherein a first one from among the first transistor and the second transistor has a p-type transistor characteristic within a first voltage range, and a second one from among the first transistor and the second transistor has an n-type transistor characteristic within the first voltage range.

19. The semiconductor device of claim 14 , wherein a combination of the first transistor and the second transistor constitutes an inverter.

20. An electronic device comprising the semiconductor device of claim 14 .

Assignees

• Samsung Electronics Co Ltd

Inventors

• Kim Unjeong
• Shim Youngseon
• Park Yeonsang
• Lee Changwon
• Hwang Sungwoo

Classifications

• H10D30/611

  having multiple independently-addressable gate electrodes influencing the same channel (FinFETs having multiple distinct gate electrodes H10D30/6215; multi-gate TFT H10D30/6733) · CPC title

• H10D30/667 Primary

  having substrates comprising insulating layers, e.g. SOI-VDMOS transistors · CPC title

• H01L27/1207

  Electricity · mapped topic

• H01L29/1606

  Electricity · mapped topic

• H01L29/42356 Primary

  Electricity · mapped topic