Display apparatus

Patent metadata

Field	Value
Publication number	US-9547207-B2
Application number	US-201414498656-A
Country	US
Kind code	B2
Filing date	Sep 26, 2014
Priority date	Feb 4, 2014
Publication date	Jan 17, 2017
Grant date	Jan 17, 2017

Abstract

A display apparatus including a display panel. The display panel includes a pixel generating an image, and a driver chip disposed on the display panel to drive the display panel. The driver chip includes a driving IC, signal bumps, an input bump, and an output bump electrically connected to the input bump. The display panel further includes a printed circuit board including a timing controller, a flexible printed circuit board electrically connecting the display panel and the printed circuit board, signal lines each having one end electrically connected to one of the signal bumps and the other end electrically connected to the timing controller, an input line applying a test signal to the input bump, an output line of which one end thereof is electrically connected to the output bump, and a test resistor connected to the output line.

First claim

What is claimed is:

1. A display apparatus comprising:
a display panel comprising pixels;
a driver chip disposed on the display panel and configured to drive the display panel, the driver chip comprising a driving IC, signal bumps, an input bump, and an output bump electrically connected to the input bump in the driver chip;
a printed circuit board comprising a timing controller;
a flexible printed circuit board configured to electrically connect the display panel and the printed circuit board;
a signal lines that each having one end electrically connected to one of the signal bumps and the other end electrically connected to the timing controller;
an input line configured to apply a test signal to the input bump of the driver chip;
an output line having a first end electrically connected to the output bump of the driver chip; and
a test resistor connected to a second end of the output line.

2. The display apparatus of claim 1 , wherein the test resistor has a resistance value that is equal to a termination resistance of the driving IC.

3. The display apparatus of claim 2 , wherein the input line has the same impedance as the signal lines.

4. The display apparatus of claim 3 , wherein the input line has the same thickness as and a same width as the signal lines.

5. The display apparatus of claim 2 , wherein the output line has the same impedance as the signal lines.

6. The display apparatus of claim 5 , wherein the output line has the same thickness and the same width as the signal lines.

7. The display apparatus of claim 1 , further comprising a test pad electrically connected to the output line, the test pad having a width greater than that of the output line.

8. The display apparatus of claim 7 , wherein the test pad and the test resistor are disposed on the display panel.

9. The display apparatus of claim 8 , wherein the display panel comprises:
a display area comprising the pixels; and
a non-display area disposed outside of the display area,
wherein the test pad and the test resistor are disposed in the non-display area.

10. The display apparatus of claim 7 , wherein the test pad and the test resistor are disposed on the printed circuit board.

11. The display apparatus of claim 10 , wherein the test resistor comprises a variable resistor.

12. The display apparatus of claim 1 , wherein one end of the input line is connected to the timing controller.

13. The display apparatus of claim 12 , wherein the timing controller comprises a test signal input part configured to input the test signal to the input line.

14. The display apparatus of claim 1 , wherein:
the display panel comprises an array substrate and an opposite substrate facing the array substrate; and
the driver chip is mounted on the array substrate.

15. The display apparatus of claim 1 , wherein the driver chip comprises a shorting line configured to short-circuit the input bump and the output bump.

16. The display apparatus of claim 1 , further comprising an anisotropic conductive film electrically connecting the signal bumps, the input bump, and the output bump to the signal lines, the input line, and the output line, respectively.

17. A display apparatus comprising:
a display panel comprising pixels;
a driver chip disposed on the display panel and configured to drive the display panel, the driver chip comprising a driving IC, signal bumps, first and second input bumps, and first and second output bumps electrically connected to the first and second input bumps in the driver chip, respectively;
a printed circuit board comprising a timing controller;
a flexible printed circuit board configured to electrically connect the display panel and the printed circuit board;
signal lines each having one end electrically connected to one of the signal bumps and the other end electrically connected to the timing controller;
first and second input lines configured to respectively apply first and second test signals to the first and second input bumps of the driver chip;
first and second output lines each having a first end electrically connected to the first and second output bumps of the driver chip, respectively; and
a test resistor connected between second ends of the first and second output lines.

18. The display apparatus of claim 17 , wherein a distance between the first and second input lines is equal to a distance between the signal lines.

19. The display apparatus of claim 17 , wherein a distance between the first and second output lines is equal to a distance between the signal lines.

20. The display apparatus of claim 17 , wherein each of the first and second test signals is a low voltage differential signal.

Assignees

• Samsung Display Co Ltd

Inventors

• Moh Sangmoon
• Kim Myeongsu
• Park Jinho
• Song Kideog

Classifications

• G02F1/13454

  Drivers integrated on the active matrix substrate (G02F1/136277 takes precedence) · CPC title

• G02F1/13452 Primary

  Conductors connecting driver circuitry and terminals of panels · CPC title