Method of authenticating a device

US9544154B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9544154-B2
Application numberUS-201314372799-A
CountryUS
Kind codeB2
Filing dateJan 21, 2013
Priority dateFeb 8, 2012
Publication dateJan 10, 2017
Grant dateJan 10, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The invention is a method for authenticating a device which comprises a chip and a body carrying the chip. The body comprises a graphical security feature. The method comprises the steps of: running a first physical unclonable function for generating a first response representative of the chip, extracting a first reference from the graphical security feature, authenticating the device by checking that said first response and first reference are linked by a preset mathematical function. The extracting step and the authenticating step are carried out by a machine distinct from the device.

First claim

Opening claim text (preview).

The invention claimed is: 1. A method for authenticating a device, said device comprising a chip and a body carrying the chip, wherein the body comprises a graphical security feature said method comprising the following steps: running a first physical unclonable function for generating a first response representative of said chip, extracting a first reference from the graphical security feature, and authenticating the device by checking that said first response and first reference are linked by a first preset mathematical function, said extracting step and authenticating step being carried out by a machine distinct from the device. 2. A method according to claim 1 , wherein the method comprises the further steps: reading a second reference from the chip, and running a second physical unclonable function for generating a second response representative of said graphical security feature, and wherein the authenticating step is performed by checking that said second response and second reference are linked by a second preset mathematical function. 3. A method according to claim 1 , wherein the graphical security feature comprises at least one element selected from the group consisting of Optical Variable Ink, Microtext, relief printing, rainbow printing, UV printing, Holographic overlay, Diffractive Optically Variable Image Device, changeable laser image and multiple laser images. 4. A method according to claim 1 , wherein the method comprises the further step of updating an indicator in the chip if the authenticating step is unsuccessful. 5. A device comprising: a chip and a body carrying the chip, said device being configured to run a first physical unclonable function able to generate a first response representative of said chip, wherein the body comprises a graphical security feature, and wherein said graphical security feature comprises a first reference that has been computed by applying said first response to a first mathematical function, said first reference comprising data that, in combination with said first response, enables the device to be authenticated. 6. A device according to claim 5 , wherein the graphical security feature comprises at least one element selected from the group consisting of Optical Variable Ink, Microtext, relief printing, rainbow printing, UV printing, Holographic overlay, Diffractive Optically Variable Image Device, changeable laser image and multiple laser images. 7. A system comprising: a machine, and a device, said device comprising a chip and a body carrying the chip, said device being configured to run a first physical unclonable function to generate a first response representative of said chip, wherein the body comprises a graphical security feature, wherein said graphical security feature comprises a first reference that is computed by applying said first response to a first mathematical function, said first reference enabling the authentication of the device in combination with said first response, wherein said machine is configured to extract said first reference from the graphical security feature, and wherein said machine is further configured to authenticate the device by checking that said first response and first reference are linked by said first preset mathematical function, the machine being distinct from the device. 8. A system according to claim 7 , wherein the machine comprises a computing apparatus configured to read a second reference from the chip to run a second physical unclonable function for generating a second response representative of said graphical security feature, and to authenticate the device by checking that said second response and second reference are linked by a second preset mathematical function. 9. A system according to claim 7 , wherein the machine comprises a computing apparatus configured to update an indicator in the chip if the authentication of the device fails. 10. A method for personalizing a device, said device comprising a chip and a body carrying the chip, said method comprising the following steps: running a first physical unclonable function for generating a first response representative of said chip, computing a first reference by applying said first response to a first mathematical function and writing a graphical security feature which comprises said first reference on the body. 11. A method according to claim 10 , wherein the method comprises the further steps: running a second physical unclonable function for generating a second response representative of said graphical security feature, computing a second reference by applying said second response to a second mathematical function and writing said second reference into the chip.

Assignees

Inventors

Classifications

  • G06K19/073Primary

    Special arrangements for circuits, e.g. for protecting identification code in memory (protection against unauthorised use of computer memory G06F12/14) · CPC title

  • Physics · mapped topic

  • Physics · mapped topic

  • Hardware reduction or efficient architectures · CPC title

  • H04L9/3278Primary

    using physically unclonable functions [PUF] · CPC title

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Frequently asked questions

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What does patent US9544154B2 cover?
The invention is a method for authenticating a device which comprises a chip and a body carrying the chip. The body comprises a graphical security feature. The method comprises the steps of: running a first physical unclonable function for generating a first response representative of the chip, extracting a first reference from the graphical security feature, authenticating the dev…
Who is the assignee on this patent?
Gemalto Sa
What technology area does this patent fall under?
Primary CPC classification G06K19/073. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jan 10 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).