Systems and methods for parallel signal cancellation

US9544044B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9544044-B2
Application numberUS-96693110-A
CountryUS
Kind codeB2
Filing dateDec 13, 2010
Priority dateSep 20, 2002
Publication dateJan 10, 2017
Grant dateJan 10, 2017

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  1. Title

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  5. First independent claim

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Abstract

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The present invention provides systems and methods for parallel interference suppression. In one embodiment of the invention, a processing engine is used to substantially cancel a plurality of interfering signals within a received signal. The processing engine includes a plurality of matrix generators that are used to generate matrices, each matrix comprising elements of a unique interfering signal selected for cancellation. The processing engine also includes one or more processors that use the matrices to generate cancellation operators. A plurality of applicators applies the cancellation operators to parallel but not necessarily unique input signals to substantially cancel the interfering signals from the input signals. These input signals may include received signals, interference cancelled signals and/or PN codes.

First claim

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What is claimed is: 1. A processing engine, comprising: a plurality of matrix generators, wherein each of the plurality of matrix generators is configured for generating a matrix comprising elements representing components of a code of a different one of a plurality of interfering signals selected for suppression; a processor communicatively coupled to the plurality of matrix generators and configured for generating a plurality of suppression operators; a plurality of applicators, wherein each applicator is communicatively coupled to the processor and configured for applying at least one of the plurality of suppression operators to an input signal to substantially suppress at least one of the plurality of interfering signals; and an interference selector configured for selecting at least one of the plurality of interfering signals as an input to the plurality of matrix generators, wherein the interference selector selects at least one of the plurality of interfering signals based on a pre-determined criteria including at least one of amplitude, timing offset, phase, or code sequence; wherein the processing engine is in a receiver and wherein the processing engine further comprises a connection element configured for receiving one or more output signals from the plurality of applicators and for selecting one or more of the one or more output signals as inputs to one or more processing fingers of the receiver; wherein the connection element comprises one or more selectors configured for receiving one or more of the output signals and for selecting one or more of the output signals as inputs to one or more of the processing fingers; wherein the output signals are interference suppressed signals; and wherein the plurality of matrix generators are in parallel with each other. 2. The processing engine of claim 1 , wherein at least one of the one or more selectors is further configured for receiving a digitized signal comprising one or more Code Division Multiple Access signals as an input to one of the processing fingers. 3. The processing engine of claim 1 , wherein at least one of the one or more selectors is further configured for receiving a digitized signal comprising one or more Wideband Code Division Multiple Access signals as an input to one of the processing fingers. 4. The processing engine of claim 1 , wherein each of the one or more selectors is further configured for receiving a digitized signal comprising one or more Global Positioning System signals as an input to one of the processing fingers. 5. The processing engine of claim 1 , wherein the interference selector is further configured for providing on-time interfering pseudo noise (PN) codes of the interfering signals to the plurality of matrix generators. 6. The processing engine of claim 1 , wherein the interference selector selects the at least one of the plurality of interfering signals based on amplitude. 7. The processing engine of claim 1 , wherein the interference selector selects the at least one of the plurality of interfering signals based on timing offset. 8. The processing engine of claim 1 , wherein the interference selector selects the at least one of the plurality of interfering signals based on phase. 9. The processing engine of claim 1 , wherein the interference selector selects the at least one of the plurality of interfering signals based on code sequence. 10. A method of suppressing interference, comprising: generating a plurality of matrices, each of the plurality of matrices comprising elements of a different one of a plurality of interference signals selected for suppression; generating a plurality of suppression operators from the plurality of matrices; applying the plurality of suppression operators in parallel to an input signal to substantially suppress at least one of the interference signals; selecting one or more output signals generated in response to applying, for assignment of the one or more output signals to one or more processing fingers of a receiver; selecting at least one of the plurality of interference signals for input to the plurality of matrices, wherein the at least one of the plurality of interference signals is selected based on a pre-determined criteria including at least one of amplitude, timing offset, phase, or code sequence; wherein the one or more output signals are interference suppressed signals; and wherein the plurality of matrices are in parallel with each other. 11. The method of claim 10 , further comprising providing one or more on-time interfering pseudo noise (PN) codes of the interfering signals to the matrices in response to selecting. 12. The method of claim 10 , further comprising transferring the one or more output signals to the one or more processing fingers in response to selecting said output signals as input signals to the processing fingers. 13. The method of claim 10 , further comprising receiving a Code Division Multiple Access signal. 14. The method of claim 10 , further comprising receiving a Wideband Code Division Multiple Access signal. 15. The method of claim 10 , further comprising receiving a Global Positioning System signal. 16. The method of claim 10 , wherein the at least one of the plurality of interference signals is selected based on amplitude. 17. The method of claim 10 , wherein the at least one of the plurality of interference signals is selected based on timing offset. 18. The method of claim 10 , wherein the at least one of the plurality of interference signals is selected based on phase. 19. The method of claim 10 , wherein the at least one of the plurality of interference signals is selected based on code sequence. 20. A system for suppressing interference, comprising: means for generating a plurality of matrices, each matrix comprising elements of a different one of a plurality of interference signals selected for suppression; means for generating a plurality of suppression operators from the plurality of matrices; means for applying the plurality of suppression operators in parallel to an input signal to substantially suppress at least one of the plurality interference signals to form one or more output signals; and means for selecting at least one of the plurality of interfering signals as inputs to the plurality of matrices, wherein the at least one of the plurality of interfering signals is selected based on a pre-determined criteria including at least one of amplitude, timing offset, phase, or code sequence; and wherein the plurality of matrices are in parallel with each other. 21. The system of claim 20 , further comprising means for providing on-time interfering pseudo noise (PN) codes of one or more of the plurality of interfering signals to the one or more matrices in response to selecting. 22. The system of claim 21 , further comprising means for receiving a Wideband Code Division Multiple Access signal. 23. The system of claim 20 , further comprising means for selecting the one or more output signals for assignment of the one or more output signals to one or more processing fingers of a receiver. 24. The system of claim 23 , further comprising means for transferring one or more output signals to the one or more processing fingers in response to selecting said output signals. 25. The system of claim 23 , wherein the one or more output signals are interference suppressed signals. 26. The system of claim 20 , furth

Assignees

Inventors

Classifications

  • H04B7/0891Primary

    Space-time diversity (rake receivers H04B1/7115; space-time decoding H04L1/0631) · CPC title

  • Joint detection techniques, e.g. linear detectors · CPC title

  • Selection, re-selection, allocation or re-allocation of paths to fingers, e.g. timing offset control of allocated fingers · CPC title

  • Weighting of fingers for combining, e.g. amplitude control or phase rotation using an inner loop · CPC title

  • H04B1/7107Primary

    Subtractive interference cancellation · CPC title

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What does patent US9544044B2 cover?
The present invention provides systems and methods for parallel interference suppression. In one embodiment of the invention, a processing engine is used to substantially cancel a plurality of interfering signals within a received signal. The processing engine includes a plurality of matrix generators that are used to generate matrices, each matrix comprising elements of a unique interfering si…
Who is the assignee on this patent?
Narayan Anand P, Olson Eric S, Thomas John K, and 1 more
What technology area does this patent fall under?
Primary CPC classification H04B7/0891. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jan 10 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).