Variable resistance material layers and variable resistance memory devices including the same

Patent metadata

Field	Value
Publication number	US-9543513-B2
Application number	US-201514965616-A
Country	US
Kind code	B2
Filing date	Dec 10, 2015
Priority date	Dec 23, 2014
Publication date	Jan 10, 2017
Grant date	Jan 10, 2017

Abstract

A variable resistance material layer including germanium (Ge), antimony (Sb), tellurium (Te), and at least one type of impurities X. The variable resistance material layer having a composition represented by a chemical formula of X p (Ge a Sb (1-a-b) Te b ) (1-p) , wherein an atomic concentration of the impurities X is in a range of 0<p≦0.2, an atomic concentration of Ge is in a range of 0.05≦a<0.19, and an atomic concentration of Te is in a range of 0.42≦b≦0.56.

First claim

What is claimed is:

1. A variable resistance material layer, comprising germanium (Ge), antimony (Sb), tellurium (Te), and at least one type of impurities (X),
wherein the variable resistance material layer has a composition represented by a chemical formula of X p (Ge a Sb (1-a-b) Te b ) (1-p) ,
and wherein an atomic concentration of X is in a range of 0<p≦0.2,
an atomic concentration of Ge is in a range of 0.05≦a<0.19,
and an atomic concentration of Te is in a range of 0.42≦b≦0.56,
wherein the variable resistance material layer has a shape of a pillar,
wherein a sum of top and bottom surface areas of the pillar is defined as M and an area of a sidewall of the pillar is defined as D, and
wherein D is equal to or more than three times that of M.

2. The variable resistance material layer of claim 1 , wherein the atomic concentration of Ge is in a range of 0.05≦a<0.15.

3. The variable resistance material layer of claim 1 , wherein the atomic concentration of Te is in a range of 0.52≦b<0.56.

4. The variable resistance material layer of claim 1 , wherein X is selected from the group consisting of boron (B), carbon (C), nitrogen (N), oxygen (O), aluminum (Al), silicon (Si), phosphorous (P), and sulfur (S).

5. The variable resistance material layer of claim 1 , wherein X is bismuth (Bi).

6. The variable resistance material layer of claim 1 , wherein the variable resistance material layer is kept in an amorphous state for at least one year at a temperature equal to or less than about 70° C.

7. The variable resistance material layer of claim 1 , wherein a reset current of the variable resistance material layer is equal to or less than about 200 μA.

8. The variable resistance material layer of claim 1 , wherein a resistivity of the variable resistance material layer in an amorphous state is equal to or more than 2.5 times that of the variable resistance material layer in a crystalline state.

9. A variable resistance material layer, comprising germanium (Ge), antimony (Sb), tellurium (Te), and at least two types of impurities, wherein one of the at least two types of impurities is represented by X and the other is represented by Y,
wherein the variable resistance material layer has a composition represented by a chemical formula of X p Y q (Ge a Sb (1-a-b) -Te b ) (1-p-q) ,
and wherein a sum of atomic concentrations of X and Y is in a range of 0<p+q≦0.2,
an atomic concentration of Ge is in a range of 0.05≦a<0.19,
an atomic concentration of Te is in a range of 0.42≦b≦0.56,
wherein the variable resistance material layer has a shape of a pillar,
wherein a sum of top and bottom surface areas of the pillar is defined as M and an area of a sidewall of the pillar is defined as D, and
wherein D is equal to or more than three times that of M.

10. The variable resistance material layer of claim 9 , wherein the atomic concentration of Ge is in a range of 0.05≦a<0.15.

11. The variable resistance material layer of claim 9 , wherein the atomic concentration of Te is in a range of 0.52≦b<0.56.

12. A phase-change random access memory (PRAM) device, comprising:
a lower electrode on a substrate;
a variable resistance material layer pattern on the lower electrode; and
an upper electrode on the variable resistance material layer pattern,
wherein the variable resistance material layer pattern includes germanium (Ge), antimony (Sb), tellurium (Te), and at least one type of impurities (X), and has a composition represented by a chemical formula of X p (Ge a Sb (1-a-b) Te b ) (1-p) ,
wherein an atomic concentration of X is in a range of 0<p≦0.2,
an atomic concentration of germanium (Ge) is in a range of 0.05≦a<0.19,
and an atomic concentration of tellurium (Te) is in a range of 0.42≦b≦ 0.56 ,
wherein a sum of areas of portions of the variable resistance material layer pattern contacting the upper and lower electrodes, respectively, is defined as M,
an area of the sidewall of the variable resistance material layer pattern contacting the insulation layer is defined as D, and
wherein D is equal to or more than about three times that of M.

13. The PRAM device of claim 12 , wherein the atomic concentration of Ge is in a range of 0.05≦a<0.15,
and wherein the atomic concentration of Te is in a range of 0.52<b<0.56.

14. The PRAM device of claim 12 , wherein X is selected from the group consisting of boron (B), carbon (C), nitrogen (N), oxygen (O), aluminum (Al), silicon (Si), phosphorous (P), and sulfur (S).

15. The PRAM device of claim 12 , further comprising an insulation layer surrounding a sidewall of the variable resistance material layer pattern.

16. The PRAM device of claim 12 , further comprising a diode between the substrate and the lower electrode, the diode being electrically connected to the lower electrode.

17. The PRAM device of claim 16 , wherein, in a plan view, the diode has a shape of a circle or a rectangle with rounded corners.

18. The PRAM device of claim 17 , wherein, in a plan view, the variable resistance material layer pattern, the lower electrode, and the diode have substantially the same shape.

19. The variable resistance material layer of claim 1 , wherein the variable resistance material layer has a crystallization rate of less than about 80 ns.

Assignees

• Kim Do-Hyung
• Kim Jong-Uk
• Ahn Dong-Ho
• Cho Sung-Lae
• Samsung Electronics Co Ltd

Inventors

• Kim Do-Hyung
• Kim Jong-Uk
• Ahn Dong-Ho
• Cho Sung-Lae

Classifications

• H01L45/144 Primary

  Electricity · mapped topic

• H01L27/2418

  Electricity · mapped topic

• C01B19/007 Primary

  Tellurides or selenides of metals (C01B19/002 takes precedence) · CPC title

• C01P2006/40

  Electric properties · CPC title

• H10B53/30 Primary

  characterised by the memory core region · CPC title