Circuit arrangement for suppressing an arc occurring over a contact gap of a switching member

US9543088B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9543088-B2
Application numberUS-201414302505-A
CountryUS
Kind codeB2
Filing dateJun 12, 2014
Priority dateDec 19, 2011
Publication dateJan 10, 2017
Grant dateJan 10, 2017

How to read this patent

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

The disclosure relates to a circuit arrangement for suppressing an arc occurring during a switching process, wherein a current bypass path comprises a PTC resistor connected in series with a fuse. The current bypass path is provided in parallel with a switch. The disclosure also relates to a photovoltaic power plant with a photovoltaic generator which is connected to an inverter via DC lines. In this arrangement, such a circuit arrangement is arranged in at least one of the DC lines.

First claim

Opening claim text (preview).

The invention claimed is: 1. A circuit arrangement for suppressing an arc occurring during a switching process, comprising: a current bypass path comprising a positive temperature coefficient (PTC) resistor and a fuse connected together in series; a switch connected in parallel with the current bypass path; and a circuit unit configured to limit a voltage drop across the fuse when the fuse has tripped, wherein the circuit unit is arranged in parallel with the fuse. 2. The circuit arrangement as claimed in claim 1 , further comprising a further switch connected in series with the parallel circuit of the switch and the current bypass path. 3. The circuit arrangement as claimed in claim 1 , further comprising a further switch arranged in the current bypass path. 4. The circuit arrangement as claimed in claim 2 , wherein the switch and the further switch are coupled with respect to their operation. 5. The circuit arrangement as claimed in claim 1 , wherein the circuit unit arranged in parallel with the fuse comprises at least one diode. 6. The circuit arrangement as claimed in claim 5 , wherein the circuit unit arranged in parallel with the fuse comprises two antiparallel-connected diodes. 7. The circuit arrangement as claimed in claim 5 , wherein at least one of the diodes is a zener diode or a suppressor diode. 8. The circuit arrangement as claimed in claim 1 , wherein the circuit unit arranged in parallel with the fuse comprises at least one voltage-dependent resistor. 9. The circuit arrangement as claimed in claim 1 , wherein an operation of the switch and/or an operation of the further switch is selectively blocked based on the voltage drop across the fuse. 10. The circuit arrangement as claimed in claim 9 , further comprising a comparator circuit configured to determine the voltage drop across the fuse and provide an output indicative of whether the voltage drop is greater than or less than a predetermined threshold. 11. The circuit arrangement as claimed in claim 9 , further comprising an operating coil configured to operate the switch and/or the further switch, wherein the operating coil is connected to a node connecting the fuse and the PTC resistor. 12. The circuit arrangement as claimed in claim 11 , further comprising a thermal fuse connected thermally to the switch and/or the further switch, wherein the thermal fuse is connected in series with the operating coil. 13. The circuit arrangement as claimed in claim 12 , wherein the fuse and/or the thermal fuse is a reversibly tripping fuse. 14. The circuit arrangement as claimed in claim 13 , further comprising a counting device configured to count arc extinction processes which have taken place via the current bypass path. 15. The circuit arrangement as claimed in claim 14 , wherein the counting device blocks a resetting of the reversibly tripping fuse when a predefined number of completed arc extinction processes has been reached. 16. A photovoltaic power plant having a photovoltaic generator, comprising: an inverter comprising two input DC lines configured to couple to the photovoltaic generator; and a circuit arrangement arranged in at least one of the DC lines, the circuit arrangement comprising: a current bypass path comprising a positive temperature coefficient (PTC) resistor and a fuse connected together in series; a switch connected in parallel with the current bypass path; and a circuit unit configured to limit a voltage drop across the fuse when the fuse has tripped, wherein the circuit unit is arranged in parallel with the fuse. 17. The photovoltaic power plant as claimed in claim 16 , wherein the switch and/or the further switch is part of a relay for the electrical isolation of the photovoltaic generator from the inverter. 18. The photovoltaic power plant as claimed in claim 16 , further comprising an arc-proof switching unit connected in series with the circuit arrangement. 19. The photovoltaic power plant as claimed in claim 18 , wherein the arc-proof switching unit has a switch which is formed by the switch and/or the further switch of the circuit arrangement.

Assignees

Inventors

Classifications

  • for DC applications · CPC title

  • H01H9/42Primary

    Impedances connected with contacts · CPC title

  • concerning the disconnection itself, e.g. at a particular instant, particularly at zero value of current, disconnection in a predetermined order (disconnection at zero value in general H03K17/18) · CPC title

  • Contacts shunted by semiconductor devices · CPC title

  • Means for protecting converters other than automatic disconnection · CPC title

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Frequently asked questions

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What does patent US9543088B2 cover?
The disclosure relates to a circuit arrangement for suppressing an arc occurring during a switching process, wherein a current bypass path comprises a PTC resistor connected in series with a fuse. The current bypass path is provided in parallel with a switch. The disclosure also relates to a photovoltaic power plant with a photovoltaic generator which is connected to an inverter via DC lines. I…
Who is the assignee on this patent?
Sma Solar Technology Ag
What technology area does this patent fall under?
Primary CPC classification H01H9/42. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jan 10 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).