Semiconductor device including memory cell and sense amplifer, and IC card including semiconductor device

Patent metadata

Field	Value
Publication number	US-9543007-B2
Application number	US-201615166152-A
Country	US
Kind code	B2
Filing date	May 26, 2016
Priority date	Jun 10, 2015
Publication date	Jan 10, 2017
Grant date	Jan 10, 2017

Abstract

A semiconductor device includes a memory cell; circuitry that generates a reference voltage; and a sense amplifier including a first input terminal electrically connected to the memory cell, and a second input terminal electrically connected to the circuitry. The sense amplifier obtains a value in correlation with a resistance value of the memory cell based on a comparison between a sense voltage applied to the first input terminal and the reference voltage applied to the second input terminal. The sense voltage changes at a speed in correlation with the resistance value of the memory cell. In at least part of a period during which the sense voltage changes, the circuitry causes the reference voltage to change in a direction opposite to a direction in which the sense voltage changes.

First claim

What is claimed is:

1. A semiconductor device comprising:
a memory cell;
circuitry that generates a reference voltage; and
a sense amplifier including a first input terminal electrically connected to the memory cell, and a second input terminal electrically connected to the circuitry,
wherein the sense amplifier obtains a value in correlation with a resistance value of the memory cell based on a comparison between a sense voltage applied to the first input terminal and the reference voltage applied to the second input terminal, the sense voltage changing at a speed in correlation with the resistance value of the memory cell, and
in at least part of a period during which the sense voltage changes, the circuitry changes the reference voltage in a direction opposite to a direction in which the sense voltage changes.

2. The semiconductor device according to claim 1 ,
wherein the sense voltage decreases at a speed in correlation with the resistance value of the memory cell, and
in at least part of a period during which the sense voltage decreases, the circuitry increases the reference voltage with lapse of time.

3. The semiconductor device according to claim 1 ,
wherein the sense voltage increases at a speed in correlation with the resistance value of the memory cell, and
in at least part of a period during which the sense voltage increases, the circuitry decreases the reference voltage with lapse of time.

4. The semiconductor device according to claim 2 ,
wherein the circuitry starts to increase the reference voltage at a certain point in the period in which the sense voltage decreases.

5. The semiconductor device according to claim 3 ,
wherein the circuitry starts to decrease the reference voltage at a certain point in the period in which the sense voltage increases.

6. The semiconductor device according to claim 2 ,
wherein the circuitry increases the reference voltage stepwise.

7. The semiconductor device according to claim 3 ,
wherein the circuitry decreases the reference voltage stepwise.

8. The semiconductor device according to claim 1 ,
wherein the circuitry includes:
a first circuit that generates a predetermined constant voltage;
a second circuit that generates a voltage changing with lapse of time; and
a switch disposed between the first circuit and the first input terminal of the sense amplifier.

9. The semiconductor device according to claim 8 ,
wherein the switch switches between a first state in which the first circuit and the first input terminal of the sense amplifier are connected, and a second state in which the second circuit and the first input terminal of the sense amplifier are connected.

10. The semiconductor device according to claim 1 ,
wherein the memory cell comprises a variable resistance memory element including a first electrode, a second electrode, and a variable resistance layer disposed between the first and second electrodes.

11. The semiconductor device according to claim 10 ,
wherein the variable resistance memory element is configured to
change from a low resistance state to a high resistance state under application of voltage having a first polarity across the first and second electrodes, and
change from a high resistance state to a low resistance state under application of voltage having a second polarity opposite to the first polarity across the first and second electrodes.

12. The semiconductor device according to claim 1 , further comprising a memory cell array including a plurality of memory cells,
wherein the memory cell is selected one of the memory cells of the memory cell array.

13. The semiconductor device according to claim 1 ,
wherein the value in correlation with the resistance value of the memory cell is a value of 2 bits or greater.

14. The semiconductor device according to claim 1 ,
wherein the value in correlation with the resistance value of the memory cell is a value corresponding to a time from a predetermined time until an inequality relation between the sense voltage and the reference voltage is reversed.

15. The semiconductor device according to claim 14 ,
wherein the sense amplifier includes
a comparator that compares the sense voltage with the reference voltage, and
a counter that continues to count from the predetermined time until the inequality relation between the sense voltage and the reference voltage is reversed.

16. The semiconductor device according to claim 2 ,
wherein the sense amplifier causes electric charges to be charged in at least part of a current path extending between the first input terminal and the memory cell, and
while the charged electric charges are discharged, the sense voltage decreases at a speed in correlation with the resistance value of the memory cell.

17. The semiconductor device according to claim 3 ,
wherein the sense amplifier causes electric charges to be charged in at least part of a current path extending between the first input terminal and the memory cell, and
while the electric charges are charged, the sense voltage increases at a speed in correlation with the resistance value of the memory cell.

18. An IC card including the semiconductor device according to claim 1 .

Assignees

• Panasonic Ip Man Co Ltd

Inventors

• Azuma Ryotaro
• Katoh Yoshikazu

Classifications

• G11C7/06

  Sense amplifiers; Associated circuits {, e.g. timing or triggering circuits} · CPC title

• G11C13/004 Primary

  Reading or sensing circuits or methods · CPC title

• G11C7/067

  Single-ended amplifiers · CPC title

• G11C7/14

  Dummy cell management; Sense reference voltage generators · CPC title

• G11C13/0007 Primary

  comprising metal oxide memory material, e.g. perovskites · CPC title