Printed circuit board

US9538634B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9538634-B2
Application numberUS-201313960469-A
CountryUS
Kind codeB2
Filing dateAug 6, 2013
Priority dateAug 16, 2012
Publication dateJan 3, 2017
Grant dateJan 3, 2017

How to read this patent

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A printed circuit board (e.g., 103 ) includes capacitor elements (e.g., 121 and 122 ). The capacitor element (e.g., 121 ) returns a common mode current included in a signal output from a signal output terminal (e.g., 111 ) of a semiconductor element (e.g., 102 ), to a ground terminal (e.g., 113 ) of the semiconductor element (e.g., 102 ). The capacitor element (e.g., 122 ) returns a common mode current included in a signal output from a signal output terminal (e.g., 112 ) of the semiconductor element (e.g., 102 ), to the ground terminal (e.g., 113 ) of the semiconductor element (e.g., 102 ). The capacitor elements (e.g., 121 and 122 ) are arranged such that the mutual inductance between a parasitic inductance of the capacitor element (e.g., 121 ) and a parasitic inductance of the capacitor element (e.g., 122 ) for the common mode currents is a negative value. Accordingly, the effective inductances of the first and second capacitor elements for the common mode currents are reduced, which suppresses radiation noise.

First claim

Opening claim text (preview).

What is claimed is: 1. A printed circuit board comprising: a printed wiring board; a semiconductor element mounted on the printed wiring board and having a ground terminal connected to a ground, and a first signal output terminal and a second signal output terminal outputting differential signals; a first differential signal wiring and a second differential signal wiring connected to the first and second signal output terminals of the semiconductor element, respectively, and transmitting differential signals; a first capacitor element arranged between the first differential signal wiring and a ground, and having a first terminal connected to the first differential signal wiring and a second terminal connected to a ground; and a second capacitor element arranged between the second differential signal wiring and a ground, and having a third terminal connected to the second differential signal wiring and a fourth terminal connected to a ground, wherein the first capacitor element and the second capacitor element are arranged side by side such that the first terminal of the first capacitor element and the fourth terminal of the second capacitor element face each other, and the second terminal of the first capacitor element and the third terminal of the second capacitor element face each other, and wherein the first capacitor element and the second capacitor element are arranged so that a first direction of a common mode current from the first terminal to the second terminal and a second direction of a common mode current from the third terminal to the fourth terminal are different from each other, and wherein a planar ground pattern having ground potential is formed in a layer different from a layer on which the semiconductor element is mounted, and the second terminal of the first capacitor element and the fourth terminal of the second capacitor element are connected to the planar ground pattern through a via. 2. The printed circuit board according to claim 1 , wherein the first capacitor element and the second capacitor element are formed in an area between the first differential signal wiring and the second differential signal wiring. 3. The printed circuit board according to claim 1 , wherein an angle of 0-10 degrees is formed between a line from the first terminal to the second terminal of the first capacitor element, and a line from the third terminal to the fourth terminal of the second capacitor element. 4. The printed circuit board according to claim 1 , wherein when a signal is outputted from the first differential signal wiring to the first capacitor element, and when a signal is outputted from the second differential signal wiring to the second capacitor element, mutual inductance between parasitic self-inductances of the first and the second capacitor elements is negative value. 5. An electronic apparatus having the printed circuit board according to claim 1 , wherein the first or the second differential signal wiring formed on the printed circuit board is connected to another semiconductor element through a cable. 6. The printed circuit board according to claim 1 , further comprising: a first inductor element arranged on the first differential signal wiring at a side of a position connecting the first capacitor element opposite to a side of the first signal output terminal, and forming a portion of the first differential signal wiring; a second inductor element arranged on the second differential signal wiring at a side of a position connecting the second capacitor element opposite to a side of the second signal output terminal, and forming a portion of the second differential signal wiring; and a third capacitor element having one end connected to a side of the first inductor element, arranged on the first differential signal wiring, opposite to a side of the first signal output terminal, and having another end connected to a side of the second inductor element, arranged on the second differential signal wiring, opposite to a side of the second signal output terminal on the second differential signal wiring. 7. The printed circuit board according to claim 1 , further comprising: a first inductor element arranged on the first differential signal wiring at a side of a position connecting the first capacitor element opposite to a side of the first signal output terminal, and forming a portion of the first differential signal wiring; a second inductor element arranged on the second differential signal wiring at a side of a position connecting the second capacitor element opposite to a side of the second signal output terminal, and forming a portion of the second differential signal wiring; a fourth capacitor element arranged between the first differential signal wiring and a ground at a side of the first inductor element, arranged on the first differential signal wiring, opposite to a side of the first signal output terminal, and having a fifth terminal connected to the first signal output terminal and a sixth terminal connected to a ground; and a fifth capacitor element arranged between the second differential signal wiring and a ground at a side of the second inductor element, arranged on the second differential signal wiring, opposite to a side of the second signal output terminal, and having a seventh terminal connected to the second signal output terminal and a eighth terminal connected to a ground, wherein the fourth capacitor element and the fifth capacitor element are arranged side by side such that the fifth terminal of the fourth capacitor element and the eighth terminal of the fifth capacitor element face each other, and the sixth terminal of the fourth capacitor element and the seventh terminal of the fifth capacitor element face each other. 8. The printed circuit board according to claim 1 , wherein the first capacitor element and the second capacitor element are arranged so that a third direction of a differential mode current between the first terminal and the second terminal and a fourth direction of a differential mode current between the third terminal and the fourth terminal are the same as each other. 9. The printed circuit board according to claim 6 , wherein the first capacitor element and the second capacitor element are formed in an area between the first differential signal wiring and the second differential signal wiring. 10. The printed circuit board according to claim 6 , wherein an angle of 0-10 degrees is formed between a line from the first terminal to the second terminal of the first capacitor element, and a line from the third terminal to the fourth terminal of the second capacitor element. 11. The printed circuit board according to claim 6 , wherein when a signal is outputted from the first differential signal wiring to the first capacitor element, and when a signal is outputted from the second differential signal wiring to the second capacitor element, mutual inductance between parasitic self-inductances of the first and the second capacitor elements is negative value. 12. An electronic apparatus having the printed circuit board according to claim 6 , wherein the first or the second differential signal wirings formed on the printed circuit board is connected to another semiconductor element through a cable. 13. The printed circuit board according to claim 7 , wherein the first capacitor element and the second capacitor element are formed in an area between the first differential signal wiring and the second differential signal wiring. 14. The printed circuit board according to claim 7 , wherein an angle of 0-10 degrees is formed between a line from the first termi

Assignees

Inventors

Classifications

  • Cross-Sectional Technologies · mapped topic

  • Filters, inductors or a magnetic substance · CPC title

  • H05K1/0231Primary

    Capacitors or dielectric substances · CPC title

  • Means against parasitic impedance; Means against eddy currents · CPC title

  • Lay-out of balanced signal pairs, e.g. differential lines or twisted lines · CPC title

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Frequently asked questions

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What does patent US9538634B2 cover?
A printed circuit board (e.g., 103 ) includes capacitor elements (e.g., 121 and 122 ). The capacitor element (e.g., 121 ) returns a common mode current included in a signal output from a signal output terminal (e.g., 111 ) of a semiconductor element (e.g., 102 ), to a ground terminal (e.g., 113 ) of the semiconductor element (e.g., 102 ). The capacitor element (e.g., 122 ) returns a c…
Who is the assignee on this patent?
Canon Kk
What technology area does this patent fall under?
Primary CPC classification H05K1/0231. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jan 03 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).