Circuit, an integrated circuit, a transmitter, a receiver, a transceiver, a method for obtaining calibration data and a method for generating a local oscillator signal

Patent metadata

Field	Value
Publication number	US-9537585-B2
Application number	US-201514620488-A
Country	US
Kind code	B2
Filing date	Feb 12, 2015
Priority date	Mar 31, 2014
Publication date	Jan 3, 2017
Grant date	Jan 3, 2017

Abstract

A circuit according to an example includes a digital-to-time converter and a signal processing circuit coupled to the digital-to-time converter and configured to generate a processed signal derived from a signal provided to the signal processing circuit, the processed signal including a predetermined phase relation with respect to the signal provided to the signal processing circuit, wherein the circuit is configured to receive a reference signal and to generate an output signal based on the received reference signal. The a measurement circuit is configured to measure a delay between the output signal and the reference signal, wherein the output of the digital-to-time converter is coupled to a memory configured to store calibration data of the digital-to-time converter based on the measured delay.

First claim

The invention claimed is:

1. A circuit comprising:
a digital-to-time converter; and
a signal processing circuit coupled to the digital-to-time converter and configured to generate a processed signal derived from a signal provided to the signal processing circuit, the processed signal comprising a predetermined phase relation with respect to the signal provided to the signal processing circuit,
wherein the circuit is configured to receive a reference signal and to generate an output signal based on the received reference signal;
a measurement circuit configured to measure a delay between the output signal and the received reference signal and store, in a memory, digital-to-time converter calibration data derived from the delay,
wherein the signal processing circuit is configured to operate independent of a signal provided by the measurement circuit.

2. The circuit according to claim 1 , wherein the digital-to-time converter and the signal processing circuit are coupled in series forming a series connection, wherein the reference signal is provided to an input of the series connection and the output signal is obtained at an output of the series connection.

3. The circuit according to claim 1 , wherein the reference signal is provided to the signal processing circuit, and wherein the output signal is obtained from the digital-to-time converter.

4. The circuit according to claim 1 , wherein the signal processing circuit is configured to change the predetermined phase relation, and wherein the circuit comprises a generator circuit configured to provide a control signal to the digital-to-time converter to counteract the change of the predetermined phase relation.

5. The circuit according to claim 4 , wherein the generator circuit comprises an integrator or an accumulator coupled to the digital-to-time converter to provide the control signal.

6. The circuit according to claim 5 , wherein the integrator or the accumulator is clocked by the reference signal, a signal derived from the reference signal comprising the same frequency as the reference signal or based on the output signal.

7. The circuit according to claim 1 , wherein the memory is configured to store the calibration data based on a control signal provided to the memory.

8. The circuit according to claim 1 , wherein the memory is configured to store a look-up-table comprising the calibration data.

9. The circuit according to claim 1 , wherein the signal processing circuit is configured to process an oscillating signal provided to the signal processing circuit and to generate the processed signal as an oscillating signal.

10. The circuit according to claim 1 , wherein a ratio of the frequency of the processed signal with respect to a frequency of the signal provided to the signal processing circuit or an inverse of the ratio is larger than one and equal to a sum of an integer part and a non-vanishing fractional part, wherein an absolute value of the fractional part is smaller than one.

11. The circuit according to claim 1 , wherein the signal processing circuit is configured to change the predetermined phase relation, wherein the circuit comprises a generator circuit configured to provide a control signal to the digital-to-time converter to counteract the change of the predetermined phase relation, the generator circuit comprising an integrator or an accumulator coupled to the digital-to-time converter to provide the control signal, wherein the integrator or accumulator is configured to process a signal comprising information concerning a fractional part of a desired frequency of the output signal based on a frequency of the reference.

12. The circuit according to claim 1 , wherein the signal processing circuit comprises at least one of an integer phase-locked-loop circuit, a fractional phase-locked-loop circuit, a direct digital synthesizer circuit, and a frequency multiplier circuit.

13. The circuit according to claim 1 , wherein the measurement circuit is configured to detect more than three different delay values between the output signal and the reference signal.

14. The circuit according to claim 1 , wherein the measurement circuit is part of the signal processing circuit.

15. The circuit according to claim 14 , wherein an output of the measurement circuit is coupled to a controllable oscillator configured to generate the processed signal based on the output of the measurement circuit.

16. The circuit according to claim 1 , wherein the measurement circuit comprises a time-to-digital converter.

17. The circuit according to claim 1 , comprising a control circuit configured to access the memory and generate a control signal for the digital-to-time converter based on the calibration data stored in the memory.

18. The circuit according to claim 17 , wherein the control signal communicates to the digital-to-time converter an amount of delay to add to the processed signal to align a phase of the processed signal with the reference signal prior to the processed signal becoming the output signal and further wherein the control circuit is configured to:
access the memory and identify calibration data addressed by a present control signal;
adapt the present control signal based on the calibration data; and
provide a resulting adapted control signal to the digital-to-time converter.

19. An integrated circuit comprising a circuit, the circuit comprising
a digital-to-time converter, and
a signal processing circuit coupled to the digital-to-time converter and configured to generate a processed signal derived from a signal provided to the signal processing circuit, the processed signal comprising a predetermined phase relation with respect to the signal provided to the signal processing circuit,
wherein the circuit is configured to receive a reference signal and to generate an output signal based on the received reference signal;
a measurement circuit configured to measure a delay between the output signal and the received reference signal and store, in a memory, digital-to-time converter calibration data derived from the delay,
wherein the signal processing circuit is configured to operate independent of a signal provided by the measurement circuit.

20. The integrated circuit according to claim 19 , further comprising a mixer circuit coupled to the circuit to receive the output signal of the circuit as a local oscillator signal.

21. A transmitter, a receiver or a transceiver comprising a circuit, the circuit comprising:
a digital-to-time converter, and
a signal processing circuit coupled to the digital-to-time converter and configured to generate a processed signal derived from a signal provided to the signal processing circuit, the processed signal comprising a predetermined phase relation with respect to the signal provided to the signal processing circuit,
wherein the circuit is configured to receive a reference signal and to generate an output signal based on the received reference signal; and
a measurement circuit configured to measure a delay between the output signal and the received reference signal and store, in a memory, digital-to-time converter calibration data derived from the delay,
wherein the signal processing circuit is configured to operate independent of a signal provided by the measurement circuit.

Assignees

• Intel Ip Corp

Inventors

• Mayer Thomas
• Tertinek Stefan
• Preyler Peter

Classifications

• H04B17/22 Primary

  for calibration of the receiver components · CPC title

• H03L7/1976 Primary

  using a phase accumulator for controlling the counter or frequency divider · CPC title

• H04B17/21 Primary

  for calibration; for correcting measurements · CPC title

• H04B1/62

  for providing a predistortion of the signal in the transmitter and corresponding correction in the receiver, e.g. for improving the signal/noise ratio · CPC title