Acoustic resonator device with single crystal piezo material and capacitor on a bulk substrate

US9537465B1 · US · B1

Patent metadata
FieldValue
Publication numberUS-9537465-B1
Application numberUS-201414298076-A
CountryUS
Kind codeB1
Filing dateJun 6, 2014
Priority dateJun 6, 2014
Publication dateJan 3, 2017
Grant dateJan 3, 2017

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  1. Title

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  2. Abstract

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  4. Key dates

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  5. First independent claim

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Abstract

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A method of manufacturing an integrated circuit. This method includes forming an epitaxial material comprising single crystal piezo material overlying a surface region of a substrate to a desired thickness and forming a trench region to form an exposed portion of the surface region through a pattern provided in the epitaxial material. Also, the method includes forming a topside landing pad metal and a first electrode member overlying a portion of the epitaxial material and a second electrode member overlying the topside landing pad metal. Furthermore, the method can include processing the backside of the substrate to form a backside trench region exposing a backside of the epitaxial material and the landing pad metal and forming a backside resonator metal material overlying the backside of the epitaxial material to couple to the second electrode member overlying the topside landing pad metal.

First claim

Opening claim text (preview).

What is claimed is: 1. An acoustic resonator device comprising: a bulk substrate member, having a surface region, and a thickness of material, the bulk substrate having a first recessed region and a second recessed region, and a support member disposed between the first recessed region and the second recessed region; a thickness of single crystal piezo material formed overlying the surface region, the thickness of single crystal piezo material having an exposed backside region configured with the first recessed region and a contact region configured with the second recessed region, the single crystal piezo material having a thickness of greater than 0.4 microns, the single crystal piezo material being characterized by a dislocation density of less than 10 12 defects/cm 2 ; a first electrode member formed overlying an upper portion of the thickness of single crystal piezo material; a second electrode member formed overlying a lower portion of the thickness of single crystal piezo material to sandwich the thickness of single crystal piezo material with the first electrode member and the second electrode member, the second electrode member extending from the lower portion that includes the exposed backside region to the contact region; a first electrode terminal electrically coupled to the first electrode member; a second electrode terminal electrically coupled to the second electrode member; a dielectric material overlying an upper surface region of a resulting structure overlying the bulk substrate member; and an acoustic reflector structure configured overlying the first electrode member, the upper portion, the lower portion, and the second electrode member. 2. The device of claim 1 wherein the support member is configured in a plane coincident with a bottom surface region of the bulk substrate member. 3. The device of claim 1 wherein the support member is configured in a plane off-set and recessed in reference to a bottom surface region of the bulk substrate member. 4. The device of claim 1 wherein the single crystal piezo material being characterized by X-ray diffraction with clear peak at a detector angle (2-Theta) associated with single crystal film and whose Full Width Half Maximum (FWHM) is measured to be less than 1.0°.

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What does patent US9537465B1 cover?
A method of manufacturing an integrated circuit. This method includes forming an epitaxial material comprising single crystal piezo material overlying a surface region of a substrate to a desired thickness and forming a trench region to form an exposed portion of the surface region through a pattern provided in the epitaxial material. Also, the method includes forming a topside landing pad meta…
Who is the assignee on this patent?
Akoustis Inc
What technology area does this patent fall under?
Primary CPC classification H03H9/0542. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jan 03 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 5 related publications on this page (citations in our corpus or others sharing the same primary CPC).