Pixel structure, liquid crystal display array substrate and liquid crystal display panel

Patent metadata

Field	Value
Publication number	US-9536906-B2
Application number	US-201514616553-A
Country	US
Kind code	B2
Filing date	Feb 6, 2015
Priority date	Jun 30, 2014
Publication date	Jan 3, 2017
Grant date	Jan 3, 2017

Abstract

A pixel structure is disclosed. The pixel structure includes a plurality of data lines arranged in a first direction, and a plurality of gate lines arranged in a second direction. The plurality of data lines intersect with the plurality of gate lines near a plurality of sub-pixels. In addition, each of the plurality of sub-pixels includes a thin film transistor, and a pixel electrode. The plurality of sub-pixels includes a plurality of first rows of sub-pixels, and a plurality of second rows of sub-pixels, where the first rows of sub-pixels and the second rows of sub-pixels are interleaved, each sub-pixel in the first rows of sub-pixels is provided with a signal over a second-closest data line, and each sub-pixel in the second rows of sub-pixels is provided with a signal over a first-closest data line.

First claim

What is claimed is:

1. A pixel structure, comprising:
a plurality of data lines arranged in a first direction; and
a plurality of gate lines arranged in a second direction,
wherein the plurality of data lines intersect with the plurality of gate lines near a plurality of sub-pixels, each of the plurality of sub-pixels comprising:
a thin film transistor, and
a pixel electrode,
wherein the plurality of sub-pixels comprises:
a plurality of first rows of sub-pixels, and
a plurality of second rows of sub-pixels,
wherein the first rows of sub-pixels and the second rows of sub-pixels are interleaved,
each sub-pixel in the first rows of sub-pixels is provided with a signal over a second-closest data line,
each sub-pixel in the second rows of sub-pixels is provided with a signal over a first-closest data line,
the first-closest data line is each sub-pixel's closest data line, and
the second-closest data line, which is not adjacent to the each sub-pixel is each sub-pixel's next closest data line.

2. The pixel structure according to claim 1 , wherein:
each sub-pixel in the first rows of sub-pixels is provided with a signal over a second-closest data line on a left side of the each sub-pixel in the first rows of sub-pixels; or
each sub-pixel in the first rows of sub-pixels is provided with a signal over a second-closest data line on a right side of the each sub-pixel in the first rows of sub-pixels.

3. The pixel structure according to claim 2 , wherein:
in each sub-pixel in the first rows of sub-pixels, the pixel electrode is electrically connected with a drain of the thin film transistor of a sub-pixel on a left side of the each sub-pixel in the first rows of sub-pixels, and a source of the thin film transistor is electrically connected with a first-closest data line on the left side of the each sub-pixel in the first rows of sub-pixels; or
in each sub-pixel in the first rows of sub-pixels, the pixel electrode is electrically connected with the drain of the thin film transistor of a sub-pixel on a right side of the each sub-pixel in the first rows of sub-pixels, and the source of the thin film transistor is electrically connected with a first-closest data line on the right side of the each sub-pixel in the first rows of sub-pixels.

4. The pixel structure according to claim 3 , wherein a part of the pixel electrode in each sub-pixel in the first rows of sub-pixels extends across a data line on a left side or on a right side of each sub-pixel in the first rows of sub-pixels to be electrically connected with the drain of the thin film transistor of an adjacent sub-pixel.

5. The pixel structure according to claim 1 , wherein:
each sub-pixel in the second rows of sub-pixels is provided with a signal over a first-closest data line on a left side of the each sub-pixel in the second rows of sub-pixels; or
each sub-pixel in the second rows of sub-pixels is provided with a signal over a first-closest data line on right side of the each sub-pixel in the second rows of sub-pixels.

6. The pixel structure according to claim 5 , wherein in each sub-pixel in the second rows of sub-pixels, the pixel electrode is electrically connected with a drain of the thin film transistor, and a source of the thin film transistor is electrically connected with a first-closest data line on a left side or on a right side of the sub-pixel in the second rows of sub-pixels.

7. The pixel structure according to claim 1 , wherein:
opposite potential difference signals are input over two adjacent data lines; or
two adjacent data lines constitute a group, and opposite potential difference signals are input over two adjacent groups of data lines.

8. The pixel structure according to claim 1 , wherein the plurality of gate lines of the first rows of sub-pixels and the plurality of gate lines of the second rows of sub-pixels are located between the first rows of sub-pixels and the second rows of sub-pixels.

9. The pixel structure according to claim 1 , wherein the first rows of sub-pixels and the second rows of sub-pixels are provided with at least one virtual sub-pixel at both ends thereof.

10. A liquid crystal display array substrate, comprising the pixel structure according to claim 1 .

11. A liquid crystal display panel, comprising the liquid crystal display array substrate according to claim 10 .

12. The pixel structure according to claim 1 , wherein:
the plurality of sub-pixels include sub-pixels of at least three different colors;
the sub-pixels of the at least three different colors are arranged in order in the first rows of sub-pixels;
the sub-pixels of the at least three different colors are also arranged in order in the second rows of sub-pixels; and a sub-pixel in a first row of sub-pixels, and a sub-pixel in a second row of sub-pixels, connected on a same data line are sub-pixels of a same color; and the sub-pixel in the first row of sub-pixels, and the sub-pixel in the second row of sub-pixels are located respectively on a same side of the same data line and in two adjacent two columns of sub-pixels.

13. The pixel structure according to claim 12 , wherein:
of the sub-pixels in the same color connected on the same data line, the same data line for the sub-pixel in the first row of sub-pixels is a second-closest data line on a left side of the sub-pixel in the first row of sub-pixels, and the same data line of the sub-pixel in the second row of sub-pixels is a first-closest data line on the left side of the sub-pixel in the first row of sub-pixels; or
the same data line of the sub-pixel in the first row of sub-pixels is a second-closest data line on a right side of the sub-pixel in the first row of sub-pixels, and the same data line of the sub-pixel in the second row of sub-pixels is a first-closest data line on the right side of the sub-pixel in the second row of sub-pixels.

14. The pixel structure according to claim 13 , wherein the plurality of sub-pixels include sub-pixels of red, green and blue, wherein a first color, a second color, and a third color are any one of red, green and blue, respectively, and are different from each other.

15. The pixel structure according to claim 13 , wherein the plurality of sub-pixels include sub-pixels of red, green, blue and white, and a first color, a second color, a third color and a fourth color are any one of red, green, blue and white, respectively, and are different from each other.

16. The pixel structure according to claim 1 , wherein:
the plurality of sub-pixels include sub-pixels of at least four different colors;
the sub-pixels of the at least four different colors are arranged in order in the first rows of sub-pixels;
the sub-pixels of the at least four different colors are also arranged in order in the second rows of sub-pixels;
a sub-pixel in a first row of sub-pixels, and a sub-pixel in a second row of sub-pixels, connected on a same data line are sub-pixels in a same color;
the sub-pixel in the first row of sub-pixels and the sub-pixel in the second row of sub-pixels are located respectively on both sides of the same data line, wherein there is one column of sub-pixels between a column of sub-pixels in which the sub-pixel in the first row of sub-pixels is located and a column of sub-pixels in which the sub-pixel in the second row of sub-pixels is located.

17. The pixel structure according to claim 16 , wherein:
of the sub-pixels in the same color connected on the same data line, the same data line of the sub-pixel in the first row of sub-pixels is a second-closest data line on a left side of the sub-pixel in the first row o

Assignees

• Shanghai Tianma Microelectronics Co Ltd
• Tianma Microelectronics Co Ltd

Inventors

• Li Xiaoye
• Cao Zhaokeng
• Huang Zhongshou

Classifications

• G09G3/3614

  Control of polarity reversal in general · CPC title

• G09G2300/0426

  Layout of electrodes and connections · CPC title

• G09G2300/0452

  Details of colour pixel setup, e.g. pixel composed of a red, a blue and two green components · CPC title

• G02F1/1368

  in which the switching element is a three-electrode device {(G02F1/136277 takes precedence)} · CPC title

• G02F1/134309

  characterised by their geometrical arrangement · CPC title