Semiconductor package with conformal EM shielding structure and manufacturing method of same

Patent metadata

Field	Value
Publication number	US-9536841-B2
Application number	US-201514814525-A
Country	US
Kind code	B2
Filing date	Jul 31, 2015
Priority date	Aug 1, 2014
Publication date	Jan 3, 2017
Grant date	Jan 3, 2017

Abstract

A semiconductor package includes a substrate having a front side, a bottom side, and a sidewall along a perimeter of the substrate, a plurality of solder pads on the bottom side, at least one EM shielding contact structure on the bottom side and partially exposed on the sidewall, a semiconductor device mounted on the front side, a mold compound on the front side and covering the semiconductor device, and an EM shielding layer conformally covering the mold compound and the sidewall. The EM shielding layer is in direct contact with the exposed portion of the EM shielding contact structure on the sidewall.

First claim

What is claimed is:

1. A semiconductor package, comprising:
a substrate having a front side, a bottom side, and a sidewall along a perimeter of the substrate, wherein the substrate comprises a conductive via, a ground pad, and a ground layer, wherein the conductive via electrically connects the ground pad to the ground layer;
a plurality of solder pads on the bottom side;
at least one electromagnetic (EM) shielding contact structure on the bottom side and partially exposed from the sidewall;
a semiconductor device mounted on the front side;
a mold compound on the front side and covering the semiconductor device; and
an EM shielding layer conformally covering the mold compound and the sidewall, wherein the EM shielding layer is in direct contact with a portion of the at least one EM shielding contact structure exposed from the sidewall.

2. The semiconductor package according to claim 1 , wherein the at least one EM shielding contact structure is electrically connected to the ground layer through the conductive via.

3. The semiconductor package according to claim 1 , wherein the conductive via electrically connects the ground pad to the ground layer, and the at least one EM shielding contact structure and the ground pad are structurally and electrically independent and separated from each other.

4. The semiconductor package according to claim 1 further comprising a filter device disposed on the substrate, wherein the filter device is electrically connected between the at least one EM shielding contact structure and the ground pad through at least two solder pads on the bottom side of the substrate or the front side of the substrate.

5. The semiconductor package according to claim 1 , wherein the at least one EM shielding contact structure is disposed at a corner on the bottom side of the substrate.

6. The semiconductor package according to claim 1 further comprising a plurality of solder bumps or solder balls on the plurality of solder pads.

7. The semiconductor package according to claim 1 , wherein the at least one EM shielding contact structure is covered by a solder mask on the bottom side.

8. A method for manufacturing a semiconductor package, comprising:
providing a substrate with a front side and a bottom side, wherein the substrate has a plurality of device regions thereon and a dicing region surrounding each of the device regions, wherein a plurality of solder pads and at least one electromagnetic (EM) shielding contact structure are formed on the bottom side, wherein the substrate comprises a conductive via, a ground pad, and a ground layer, wherein the conductive via electrically connects the ground pad to the ground layer;
mounting a semiconductor device on the front side of the substrate;
forming a mold compound to completely cover the front side of the substrate, wherein the mold compound covers the semiconductor device;
performing a dicing process to dice the mold compound and the substrate along the dicing region, thereby singulating a plurality of semiconductor packages and exposing a portion of the at least one EM shielding contact structure from a sidewall of the substrate; and
forming a conformal EM shielding layer on each of the semiconductor packages, wherein the conformal EM shielding layer covers the mold compound and the sidewall of the substrate, and wherein the conformal EM shielding layer is in direct contact with the exposed portion of the at least one EM shielding contact structure.

9. The method for manufacturing a semiconductor package according to claim 8 , wherein the at least one EM shielding contact structure is electrically connected to the ground layer through the conductive via.

10. The method for manufacturing a semiconductor package according to claim 8 , wherein the conductive via electrically connects the ground pad to the ground layer, and the at least one EM shielding contact structure and the ground pad are structurally and electrically independent and separated from each other.

11. The method for manufacturing a semiconductor package according to claim 8 further comprising a filter device disposed on the substrate, wherein the filter device is electrically connected between the at least one EM shielding contact structure and the ground pad through at least two solder pads on the bottom side of the substrate or the front side of the substrate.

12. The method for manufacturing a semiconductor package according to claim 8 , wherein the at least one EM shielding contact structure is disposed at a corner on the bottom side of the substrate.

13. The method for manufacturing a semiconductor package according to claim 8 further comprising a plurality of solder bumps or solder balls on the plurality of solder pads.

14. The method for manufacturing a semiconductor package according to claim 8 , wherein the at least one EM shielding contact structure is covered by a solder mask on the bottom side.

15. The method for manufacturing a semiconductor package according to claim 8 , wherein the conformal EM shielding layer is formed by using spraying methods, sputtering methods, electroplating methods, or evaporating methods.

Assignees

• Cyntec Co Ltd

Inventors

• Wu Ming-Che

Classifications

• H10P54/00

  Cutting or separating of wafers, substrates or parts of devices · CPC title

• H10W90/724

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/701

  characterised by the relative positions of pads or connectors relative to package parts · CPC title

• H10W74/117

  the substrate having spherical bumps for external connection · CPC title

• H10W74/014

  using batch processing · CPC title