Encapsulated electronic chip device with mounting provision and externally accessible electric connection structure

Patent metadata

Field	Value
Publication number	US-9536816-B2
Application number	US-201514815367-A
Country	US
Kind code	B2
Filing date	Jul 31, 2015
Priority date	Aug 1, 2014
Publication date	Jan 3, 2017
Grant date	Jan 3, 2017

Abstract

An electronic device comprising a carrier having a mounting surface, at least one electronic chip mounted on the mounting surface, at least one electric connection structure mounted on the mounting surface, an encapsulant at least partially encapsulating the carrier and the at least one electronic chip, and partially encapsulating the at least one electric connection structure so that part of a surface of the at least one electric connection structure is exposed to an environment, and a mounting provision configured for mounting the electronic device at a periphery device.

First claim

What is claimed is:

1. An electronic device, the device comprising:
a carrier having a mounting surface;
at least one electronic chip mounted on the mounting surface;
at least one electric connection structure mounted on the mounting surface;
an encapsulant at least partially encapsulating the carrier and the at least one electronic chip, and partially encapsulating the at least one electric connection structure so that part of a surface of the at least one electric connection structure is exposed to an environment;
a mounting provision configured for mounting the electronic device at a periphery device;
wherein the mounting provision extends at least partially through the encapsulant.

2. The device according to claim 1 , wherein the mounting provision is exclusively defined by the encapsulant.

3. The device according to claim 1 , wherein the mounting provision is at least partially, in particular exclusively, defined by a separate reinforcement body.

4. The device according to claim 3 , wherein the reinforcement body is at least partially encapsulated within the encapsulant.

5. The device according to claim 3 , wherein the reinforcement body is connected to the carrier, in particular is electrically coupled with the carrier.

6. The device according to claim 3 , wherein the reinforcement body is configured as a sleeve.

7. The device according to claim 3 , wherein the reinforcement body is configured as a profile, in particular as one of the group consisting of an at least partially plate-shaped profile, an at least partially strut-shaped profile, and a frame having a through hole.

8. The device according to claim 3 , wherein the reinforcement body is electrically grounded.

9. The device according to claim 1 , wherein the mounting provision is configured for mounting the electronic device at the periphery device by one of clamping and screwing.

10. The device according to claim 1 , wherein the mounting provision is configured for accommodating a mounting structure, forming part of at least one of the device and the periphery device, to thereby establish fixation between the electronic device and the periphery device.

11. The device according to claim 1 , wherein the mounting provision is configured as at least one through hole fully extending through the entire device in a thickness direction.

12. The device according to claim 10 , wherein the carrier is provided separately from the mounting structure.

13. The device according to claim 1 , wherein each of the at least one electric connection structure comprises an electrically conductive sleeve having a recess configured for accommodating a respective one of at least one electrically conductive pin.

14. The device according to claim 1 , wherein the carrier comprises an electrically insulating base plate and an electrically conductive structure, in particular a patterned electrically conductive layer, at least partially defining the mounting surface.

15. The device according to claim 1 , wherein the at least one electronic chip is configured as a power semiconductor chip, in particular comprising at least one of the group consisting of a diode, and a transistor, more particularly an insulated gate bipolar transistor.

16. An electronic arrangement, the arrangement comprising:
an electronic device according to claim 1 ;
the periphery device at which the electronic device is mounted or mountable by the mounting provision.

17. The arrangement according to claim 16 , wherein the periphery device comprises one of the group consisting of:
a cooling structure, in particular a cooling plate, wherein the electronic device is mounted or mountable on the cooling structure by the mounting provision;
an electronic mounting base having an electrically insulating core and an electrically conductive structure thereon and/or therein, in particular one of the group consisting of a Direct Copper Bonding substrate, a Direct Aluminum Bonding substrate, and a printed circuit board.

18. A method of manufacturing an electronic device, the method comprising:
mounting at least one electronic chip on a mounting surface of a carrier;
mounting at least one electric connection structure on the mounting surface;
at least partially encapsulating the carrier and the at least one electronic chip, and partially encapsulating the at least one electric connection structure by an encapsulant so that part of a surface of the at least one electric connection structure is exposed to an environment;
forming a mounting provision configured for mounting the electronic device at a periphery device;
wherein the mounting provision extends at least partially through the encapsulant.

19. The method according to claim 18 , wherein the mounting provision is formed during the encapsulating, in particular during encapsulating by molding, more particularly during encapsulating by transfer molding.

Assignees

• Infineon Technologies Ag

Inventors

• Kessler Angela
• Knauer Eduard
• Lehner Rudolf
• Schober Wolfgang
• Schultes Sigrid

Classifications

• H10W90/734

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W74/00

  Encapsulations, e.g. protective coatings · CPC title

• H10W74/131

  the semiconductor body being only partially enclosed · CPC title

• H10W74/114

  by a substrate and the encapsulations · CPC title

• H10W74/016

  using moulds · CPC title