Decoding wireless in-band on-channel signals

Patent metadata

Field	Value
Publication number	US-9536535-B2
Application number	US-201213977640-A
Country	US
Kind code	B2
Filing date	Mar 30, 2012
Priority date	Mar 30, 2012
Publication date	Jan 3, 2017
Grant date	Jan 3, 2017

Abstract

Described herein are systems, methods and apparatus for decoding in-band on-channel signals and extracting audio and data signals. Memory requirements are reduced by selectively filtering a bit stream of data in the signal so that services of interest which are encoded therein are processed. A single pool of memory may be shared between physical layer and data link layer processing. Memory in this pool may be allocated dynamically between processing of data at the physical and data link layers. When the available memory is not sufficient to support the required services, the dynamic allocation allows for graceful degradation.

First claim

What is claimed is:

1. An apparatus for decoding wireless signals, the apparatus comprising:
a memory;
a decoder coupled to the memory, the decoder comprising:
a demodulation module;
a physical layer segment planner module;
a deinterleaver module coupled to the physical layer segment planner module, wherein the deinterleaver module receives control data from the physical layer segment planner module;

an address filter module coupled to the physical layer segment planner module and the deinterleaver module, wherein the address filter module receives deinterleaved addresses of a service of interest from the physical layer segment planner module and a deinterleaved bit stream from the deinterleaver module;
a convolutional decoding module coupled to the physical layer segment planner module, wherein the convolutional decoding module receives control data from the physical layer segment planner module;
a service boundary predictor module coupled to the convolutional decoding module, wherein the service boundary predictor module receives a bit stream of data link frame segments from the convolutional decoding module; and
a dynamic memory management module that:
is coupled to:
a demodulation module, wherein the dynamic memory management module receives channel condition information from the demodulation module and
the service boundary predictor module, wherein the dynamic memory management module receives service boundary information, comprising addresses of segments for a service in a bit stream of data, from the service boundary predictor module;

manages allocation of the memory;
receives channel condition information, from the demodulation module, associated with a signal carrying the bit stream data;
initiates filtering, by the address filter module, of the bit stream by an address of a segment to generate a filtered bit stream; and
determines allocation priority of the memory based at least in part on the channel condition information.

2. The apparatus of claim 1 , wherein the memory stores at least data link layer buffers, audio pulse code modulated data, deinterleaver buffers, or a combination thereof.

3. The apparatus of claim 1 , wherein the service boundary predictor module:
receives from the convolutional decoding module a bit stream of frame segments comprising at least one service of interest and one or more other services;
receives a designation of the at least one service of interest;
determines predicted end points of segments within the bit stream of frame segments associated with the designated at least one service of interest; and
generates service boundary information comprising the predicted end points of the designated at least one service of interest within the bit stream of frame segments.

4. The apparatus of claim 1 , wherein the physical layer segment planner module:
receives service boundary information associated with a service of interest;
designates segments in a bit stream associated with the service of interest;
configures the convolutional decoding module to decode the designated segments;
determines the deinterleaved addresses of the designated segments; and
provides the deinterleaved addresses to the address filter module.

5. The apparatus of claim 1 , wherein the address filter module:
receives deinterleaved addresses of a service of interest from the physical layer segment planner module;
selects bits from a bit stream based at least in part on the deinterleaved addresses; and
stores the selected bits from the bit stream to the memory.

6. The apparatus of claim 5 , wherein the convolutional decoding module retrieves the selected bits from the memory for subsequent processing.

7. The apparatus of claim 1 , wherein the convolutional decoding module uses Viterbi decoding.

8. The apparatus of claim 1 , wherein the memory and the decoder are disposed on a common integrated circuit die.

9. The apparatus of claim 1 , wherein the decoder outputs audio data.

Assignees

• Bi Dongsheng
• Ravindran Binuraj
• Haddad Bassel
• Intel Ip Corp

Inventors

• Bi Dongsheng
• Ravindran Binuraj
• Haddad Bassel

Classifications

• H04H2201/18

  in band on channel [IBOC] · CPC title

• G10L19/167 Primary

  Audio streaming, i.e. formatting and decoding of an encoded audio signal representation into a data stream for transmission or storage purposes · CPC title

• H04N21/4435

  Memory management (allocation of memory to service a request G06F9/5016; addressing or allocating within memory systems or architectures G06F12/02) · CPC title

• H04N7/24 Primary

  Systems for the transmission of television signals using pulse code modulation (H04N21/00 takes precedence) · CPC title

• H04N21/4382

  Demodulation or channel decoding, e.g. QPSK demodulation (analog front ends or means for connecting modulators, demodulators or transceivers to a transmission line H04L27/0002) · CPC title