Display systems with compensation for line propagation delay

US9536460B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9536460-B2
Application numberUS-201615154416-A
CountryUS
Kind codeB2
Filing dateMay 13, 2016
Priority dateMay 23, 2012
Publication dateJan 3, 2017
Grant dateJan 3, 2017

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  1. Title

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  2. Abstract

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Abstract

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A method for characterizing and eliminating the effect of propagation delay on data and monitor lines of AMOLED panels is introduced. A similar technique may be utilized to cancel the effect of incomplete settling of select lines that control the write and read switches of pixels on a row.

First claim

Opening claim text (preview).

What is claimed is: 1. A method of measuring a signal offset of signals related to a display system having a pixel circuit having a light emitting device, the signal offset due to propagation delay of signals on a signal line connected to the pixel circuit, the signal line connected to the pixel circuit at one of a first location along the signal line and a second location along the signal line, the method comprising: generating from the first location a first signal over the signal line; measuring at the second location the first signal upon expiry a first time duration sufficient to avoid settling effects on the signal line generating a first signal measurement; generating from the first location a second signal over the signal line; measuring at the second location the second signal upon expiry of a second time duration insufficient to avoid settling effects on the signal line generating a second signal measurement; and comparing the first signal measurement with the second signal measurement to extract the signal offset due to propagation delay on the signal line. 2. The method of claim 1 , wherein the signal offset is a voltage signal offset, the signals related to the pixel circuit are voltage signals, and the first and second signals are voltage signals. 3. The method of claim 1 , wherein the signal offset is a current signal offset, the signals related to the pixel circuit are current signals, and the first and second signals are current signals. 4. The method of claim 1 , wherein the signal line is a data line connected to the pixel circuit at the second location, the signal offset is a programming signal offset, the signals related to the pixel circuit are programming signals transmitted to the pixel circuit, and the first and second signals are programming signals. 5. The method of claim 4 further comprising: prior to comparing the first signal measurement with the second signal measurement, extracting the first signal measurement from the second location over a monitor line after the expiry of the first time duration and after sufficient monitoring time to avoid settling effects on the monitor line; and prior to comparing the first signal measurement with the second signal measurement, extracting the second signal measurement from the second location over the monitor line after the expiry of the second time duration and after sufficient monitoring time to avoid settling effects on the monitor line, wherein measuring at the second location the first signal comprises storing a measured level of the first signal at the pixel circuit upon expiry of the first time duration and measuring at the second location the second signal comprises storing a measured level of the second signal at the pixel circuit upon expiry of the second time duration. 6. The method of claim 1 , wherein the signal line is a monitor line connected to the pixel circuit at the first location, the signal offset is a monitored signal offset, the signals related to the pixel circuit are monitored signals received from the pixel circuit, and the first and second signals are monitored signals. 7. The method of claim 1 , wherein the extracting of the signal offset due to propagation delay on the signal line is carried out during an initial factory calibration and used in future operation of the display system. 8. The method of claim 1 , further comprising calibrating at least one of programming of the pixel circuit and monitoring of the pixel circuit with use of the extracted signal offset due to propagation delay on the signal line. 9. The method of claim 1 , wherein at least one of the first time duration and the second time duration vary as a function of a physical distance between the first location and the second location.

Assignees

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Classifications

  • used for counteracting undesired variations, e.g. feedback or autozeroing · CPC title

  • Dealing with defective pixels · CPC title

  • forming a memory circuit, e.g. a dynamic memory with one capacitor · CPC title

  • Calibration of display systems · CPC title

  • G09G3/32Primary

    semiconductive, e.g. using light-emitting diodes [LED] · CPC title

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What does patent US9536460B2 cover?
A method for characterizing and eliminating the effect of propagation delay on data and monitor lines of AMOLED panels is introduced. A similar technique may be utilized to cancel the effect of incomplete settling of select lines that control the write and read switches of pixels on a row.
Who is the assignee on this patent?
Ignis Innovation Inc
What technology area does this patent fall under?
Primary CPC classification G09G3/32. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Jan 03 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).