System and method for dynamically power and performance optimized server interconnects

US9531596B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9531596-B2
Application numberUS-201514596584-A
CountryUS
Kind codeB2
Filing dateJan 14, 2015
Priority dateOct 28, 2011
Publication dateDec 27, 2016
Grant dateDec 27, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

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A system and method for packet switching functionality focused on network aggregation that reduces size and power requirements of typical systems are provided in which the system and method also increases bandwidth and reduces latency from typical deployed systems.

First claim

Opening claim text (preview).

What is claimed is: 1. A method comprising: measuring a speed of each link in a first switch, wherein the first switch includes a plurality of links to a plurality of Ethernet ports; receiving a set of control messages from a second switch; and changing the speed of each link in the first switch based on statistics regarding the set of control messages, wherein the statistics are calculated at a statistics calculation module based on historical data. 2. The method of claim 1 , wherein the first switch has a set of rules to control the speeds of the plurality of links. 3. The method of claim 2 , wherein the rules comprise one of a configuration of a bandwidth, a configuration of the speed of a link, a control of the speed of a transmit channel and a receive channel of the link, a maximum power used by the switch, or a dynamic routing of traffic. 4. The method of claim 1 , wherein the set of control messages bypasses a transmit buffer of the second switch. 5. The method of claim 1 , wherein the statistics are calculated at a receive channel and at a transmit channel. 6. The method of claim 1 , wherein each link further comprises a plurality of lanes over which data is communicated, and wherein the set of control messages is distributed over each lane. 7. The method of claim 1 , further comprising: measuring a statistic regarding each link; and determining a rate adjustment for each link based on the measured statistic. 8. The method of claim 7 , wherein the statistic is an arbitration score indicative of how long a receive channel has been waiting to win arbitration of the first switch. 9. The method of claim 7 , wherein the statistic is a bandwidth utilization of each link. 10. The method of claim 1 , wherein each link comprises a receive channel having one or more receive lanes and a transmit channel having one or more transmit lanes, wherein the method further comprises: determining a number of active receive lanes that receive data; determining a number of active transmit lanes that transmit data; determining a receive rate of the active receive lanes; and determining a transmit rate of the active transmit lanes. 11. The method of claim 10 , wherein the number of active receive lanes is different than the number of active transmit lanes. 12. The method of claim 10 , wherein the receive rate is different than the transmit rate. 13. The method of claim 10 , further comprising: receiving a message on a receive channel; determining the received message is a control message; removing the control message from the receive channel; and interrupting a processor based on receiving the control message. 14. A non-transitory computer-readable medium having instructions stored thereon, the instructions comprising: instructions to measure a speed of each link in a first switch, wherein the first switch includes a plurality of links to a plurality of Ethernet ports; instructions to receive a set of control messages from a second switch; and instructions to change the speed of each link in the first switch based on statistics regarding the set of control messages, wherein the statistics are calculated at a statistics calculation module based on historical data. 15. The non-transitory computer-readable medium of claim 14 , wherein the first switch has a set of rules to control the speeds of the plurality of links. 16. The non-transitory computer-readable medium of claim 15 , wherein the rules comprise one of a configuration of a bandwidth, a configuration of the speed of a link, a control of the speed of a transmit channel and a receive channel of the link, a maximum power used by the switch, or a dynamic routing of traffic. 17. The non-transitory computer-readable medium of claim 14 , wherein the set of control messages bypasses a transmit buffer of the second switch. 18. The non-transitory computer-readable medium of claim 14 , wherein each link further comprises a plurality of lanes over which data is communicated, and wherein the set of control messages is received over a lane 0 . 19. The non-transitory computer-readable medium of claim 14 , wherein each link comprises a receive channel having one or more receive lanes and a transmit channel having one or more transmit lanes, wherein the instructions further comprise: instructions to determine a number of active receive lanes that receive data; instructions to determine a number of active transmit lanes that transmit data; instructions to determine a receive rate of the active receive lanes; and instructions to determine a transmit rate of the active transmit lanes. 20. The non-transitory computer-readable medium of claim 19 , wherein the instructions further comprise: instructions to receive a message on a receive channel; instructions to determine the received message is a control message; instructions to remove the control message from the receive channel; and instructions to interrupt a processor based on receiving the control message.

Assignees

Inventors

Classifications

  • characterised by the switching fabric construction · CPC title

  • Bandwidth or capacity management, i.e. automatically increasing or decreasing capacities (flow or congestion control using dynamic resource allocation, e.g. in-call renegotiation, H04L47/76) · CPC title

  • H04L49/351Primary

    for local area network [LAN], e.g. Ethernet switches · CPC title

  • Peripheral units, e.g. input or output ports · CPC title

  • with rate being modified by the source upon detecting a change of network conditions · CPC title

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Frequently asked questions

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What does patent US9531596B2 cover?
A system and method for packet switching functionality focused on network aggregation that reduces size and power requirements of typical systems are provided in which the system and method also increases bandwidth and reduces latency from typical deployed systems.
Who is the assignee on this patent?
Iii Holdings 2 Llc
What technology area does this patent fall under?
Primary CPC classification H04L41/0896. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 27 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).