Level shifters for IO interfaces

US9531350B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9531350-B2
Application numberUS-201313859413-A
CountryUS
Kind codeB2
Filing dateApr 9, 2013
Priority dateAug 19, 2010
Publication dateDec 27, 2016
Grant dateDec 27, 2016

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  2. Abstract

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  5. First independent claim

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Abstract

Official abstract text for this publication.

An integrated circuit which includes a pre-driver configured to receive a first high supply voltage and to generate an input signal and at least one post-driver configured to receive at least one second high supply voltage and to receive the input signal. The at least one post-driver includes an input node configured to receive the input signal and an output node configured to output an output signal. The at least one post-driver further includes a pull-up transistor configured to be in a conductive state during an entire period of operation, and a pull-down transistor. The at least one post-driver further includes at least one diode-connected device coupled between the pull-down transistor and the output node. Each post-driver of the at least one post-driver is configured to supply the output signal having a second voltage level corresponding to a high logic level which is higher than an input voltage level.

First claim

Opening claim text (preview).

What is claimed is: 1. An integrated circuit, comprising: a pre-driver configured to receive a first high supply voltage and to generate an input signal; and at least one post-driver configured to receive at least one second high supply voltage and to receive the input signal, wherein the at least one second high supply voltage is different from the first high supply voltage, the at least one post-driver comprising: an input node configured to receive the input signal; an out…

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What does patent US9531350B2 cover?
An integrated circuit which includes a pre-driver configured to receive a first high supply voltage and to generate an input signal and at least one post-driver configured to receive at least one second high supply voltage and to receive the input signal. The at least one post-driver includes an input node configured to receive the input signal and an output node configured to output an output …
Who is the assignee on this patent?
Taiwan Semiconductor Mfg Co Ltd
What technology area does this patent fall under?
Primary CPC classification H03K3/02. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 27 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).