Amplifier compensating drift after sudden decrease of drain current

Patent metadata

Field	Value
Publication number	US-9531331-B2
Application number	US-201514626726-A
Country	US
Kind code	B2
Filing date	Feb 19, 2015
Priority date	Feb 19, 2015
Publication date	Dec 27, 2016
Grant date	Dec 27, 2016

Abstract

An RF amplifier that compensates the drift appearing after a sudden decrease of the drain current is disclosed. The RF amplifier detects the drain current by the bias control unit that feeds the change of the drain current back to the gate bias of the FET. The bias control unit responds to the sudden increase of the drain current by a relatively longer time constant; while, to the sudden decrease thereof by the second time constant enough shorter than the first time constant to compensate the drift appearing after the sudden decrease of the drain current.

First claim

What is claimed is:

1. An amplifier to amplify a radio-frequency (RF) signal varying amplitude thereof, comprising:
a field effect transistor (FET) showing a drift of a drain current after a decrease of the drain current;
a current detector to detect the drain current and generate a status signal corresponding to the drain current; and
a bias control unit to generate a gate bias for the FET by responding to an increase of the drain current by a first time constant and to the decrease of the drain current by a second time constant shorter than the first time constant,
wherein the bias control unit includes a load capacitor,
wherein the load capacitor is charged by the second time constant and discharged by the first time constant.

2. The amplifier of claim 1 ,
wherein the RF signal received by the amplifier has a period when the amplitude thereof becomes greater compared with periods except for the period, and
wherein the first time constant of the gate bias is longer than the period.

3. The amplifier of claim 2 ,
wherein the drift of the drain current has a time constant, and
wherein the second time constant is shorter than the time constant of the drift.

4. The amplifier of claim 1 ,
wherein the bias control unit further includes an amplifier and a parallel circuit of a diode and a resistor, the parallel circuit being connected between an output of the amplifier and the load capacitor,
wherein the load capacitor is charged by the amplifier through the diode by the second time constant and discharged by the amplifier through the resistor by the first time constant.

5. The amplifier of claim 4 ,
wherein the diode is forwardly biased when the load capacitor is charged, and reversely biased when the load capacitor is discharged.

6. The amplifier of claim 5 ,
wherein the amplifier and the parallel circuit constitute a peak detector.

7. The amplifier of claim 1 ,
wherein the bias control unit further includes an amplifier, a diode, and a parallel circuit of a resistor and the load capacitor, the diode being connected between an output of the amplifier and the parallel circuit, and
wherein the load capacitor is charged by the amplifier through the diode by the second time constant, and discharged through the resistor by the first time constant.

8. The amplifier of claim 7 ,
wherein the diode in the cathode thereof is connected to the parallel circuit to constitute a peak detector.

9. The amplifier of claim 1 ,
wherein the bias control unit further includes a first stage and a second stage, the first and second stages receiving the status signal from the current detector, the first stage being directly connected to the load capacitor to charge the load capacitor by the second time constant, the second stage being connected to the load capacitor through a resistor to discharge the load capacitor by the first time constant.

10. The amplifier of claim 1 ,
wherein the bias control unit further includes a first stage and a second stage, the first and second stages receiving the status signal from the current detector and being directly connected to the load capacitor,
wherein the first stage includes a transistor having a size greater than a size of transistor included in the second stage to charge the load capacitor by the second time constant, the second stage discharging the load capacitor by the first time constant.

11. The amplifier of claim 1 ,
wherein the FET is made of nitride semiconductor materials.

Assignees

• Sedi Inc

Inventors

• Inoue Shingo

Classifications

• H03F2200/18

  the bias of the gate of a FET being controlled by a control signal · CPC title

• H03F3/193

  with field-effect devices (H03F3/195 takes precedence) · CPC title

• H03F2200/462

  the current being sensed · CPC title

• H03F2200/451

  the amplifier being a radio frequency amplifier · CPC title

• H03F1/301 Primary

  in MOSFET amplifiers (H03F1/303, H03F1/305, H03F1/308 take precedence) · CPC title