Limiting amplifiers

Patent metadata

Field	Value
Publication number	US-9531326-B2
Application number	US-201514616797-A
Country	US
Kind code	B2
Filing date	Feb 9, 2015
Priority date	Feb 14, 2014
Publication date	Dec 27, 2016
Grant date	Dec 27, 2016

Abstract

A limiting amplifier includes a multiplicity of cascaded amplifier stages for amplifying an input signal for the amplifier. A further amplifier stage is supplied with a reference signal. On the basis of an output signal from the further amplifier stage, a control signal for adjusting a gain of at least one of the cascaded amplifier stages is produced.

First claim

The invention claimed is:

1. A limiting amplifier, comprising:
a multiplicity of cascaded amplifier stages for amplifying an input signal for the amplifier;
a further amplifier stage, which is modeled on one of the cascaded amplifier stages and to which a reference signal is supplied; and
a control circuit that is configured to take an output signal from the further amplifier stage as a basis for producing a control signal for adjusting a gain of at least one of the cascaded amplifier stages,
wherein the cascaded amplifier stages and the further amplifier stage each comprise a transconductance amplifier circuit and at least one load resistor, and
wherein the control signal is used to adjust a resistance value of the at least one load resistor.

2. The amplifier as claimed in claim 1 , wherein the cascaded amplifier stages and the further amplifier stage are implemented by identical circuit structures.

3. The amplifier as claimed in claim 1 , wherein at least two of the cascaded amplifier stages differ from one another in terms of a dimensioning of their circuit components.

4. The amplifier as claimed in claim 1 , wherein the control signal is used to adjust a bias current source of the transconductance amplifier circuit.

5. The amplifier as claimed in claim 1 , wherein the control circuit is configured to compare the output signal from the further amplifier stage with a further reference signal.

6. The amplifier as claimed in claim 1 , wherein the control circuit comprises an error amplifier that is configured to regulate the gain of the further amplifier stage via the control signal on the basis of a discrepancy between the output signal from the further amplifier stage and the further reference signal.

7. The amplifier as claimed in claim 5 , further comprising:
a voltage divider configured to produce the reference signal and the further reference signal as reference voltages with a prescribed ratio therebetween.

8. A limiting amplifier, comprising:
a multiplicity of cascaded amplifier stages for amplifying an input signal for the amplifier;
a further amplifier stage, which is modeled on one of the cascaded amplifier stages and to which a reference signal is supplied; and
a control circuit that is configured to take an output signal from the further amplifier stage as a basis for producing a control signal for adjusting a gain of at least one of the cascaded amplifier stages,
wherein the control circuit is configured to compare the output signal from the further amplifier stage with a further reference signal, and
wherein the reference signal and the further reference signal are differential.

9. The amplifier as claimed in claim 8 , further comprising:
a switch arrangement configured to change cyclically between:
a first state, in which the reference signal is supplied to the further amplifier stage and the further reference signal is applied to the control circuit using a first polarity, and
a second state, in which the reference signal is supplied to the further amplifier stage and the further reference signal is supplied to the control circuit using a second polarity, which is opposite to the first polarity.

10. A method comprising:
supplying an input signal to a multiplicity of cascaded amplifier stages of a limiting amplifier;
supplying a reference signal to a further amplifier stage, which is modeled on one of the cascaded amplifier stages;
producing a control signal on the basis of an output signal from the further amplifier stage; and
adjusting a gain of at least one of the cascaded amplifier stages via the control signal,
wherein the control signal is produced on the basis of a comparison of the output signal from the further amplifier stage with a further reference signal, and
wherein the reference signal and the further reference signal are differential.

11. The method as claimed in claim 10 ,
wherein the cascaded amplifier stages and the further amplifier stage are implemented by identical circuit structures.

12. The method as claimed in claim 10 ,
wherein at least two of the cascaded amplifier stages differ from one another in terms of the dimensioning of their circuit components.

13. A method comprising:
supplying an input signal to a multiplicity of cascaded amplifier stages of a limiting amplifier;
supplying a reference signal to a further amplifier stage, which is modeled on one of the cascaded amplifier stages;
producing a control signal on the basis of an output signal from the further amplifier stage; and
adjusting a gain of at least one of the cascaded amplifier stages via the control signal,
wherein the cascaded amplifier stages and the further amplifier stage each comprise a transconductance amplifier circuit and at least one load resistor, and
wherein the control signal is used to adjust a resistance value of the at least one load resistor.

14. The method as claimed in claim 10 ,
wherein the control signal is used to regulate a gain of the further amplifier stage on the basis of a discrepancy between the output signal from the further amplifier stage and the further reference signal.

15. The method as claimed in claim 10 , wherein a voltage divider is used to produce the reference signal and the further reference signal as reference voltages with a prescribed ratio therebetween.

16. The method as claimed in claim 10 , further comprising:
performing a cyclic changeover between:
a first state, in which the reference signal and the further reference signal are supplied using a first polarity, and
a second state, in which the reference signal and the further reference signal are supplied using a second polarity, which is opposite to the first polarity.

Assignees

• Infineon Technologies Ag

Inventors

• Gansinger Stefan
• Schledz Ralf-Rainer
• Schuchter Walter

Classifications

• H03G1/0029

  using field-effect transistors [FET] · CPC title

• H03F2203/45138

  Two or more differential amplifiers in IC-block form are combined, e.g. measuring amplifiers · CPC title

• H03F2200/405

  the output amplifying stage of an amplifier comprising more than three power stages · CPC title

• H03F2203/45688

  the LC comprising one or more shunting potentiometers · CPC title

• H03G7/004

  using continuously variable impedance devices · CPC title