Power factor corrector with high power factor at low road or high mains voltage conditions

Patent metadata

Field	Value
Publication number	US-9531257-B2
Application number	US-201013513992-A
Country	US
Kind code	B2
Filing date	Dec 28, 2010
Priority date	Dec 28, 2009
Publication date	Dec 27, 2016
Grant date	Dec 27, 2016

Abstract

A power factor corrector raises power factor at low loads or high mains voltages by modifying the switch timing or the current received by the power converter. It achieves this by increasing the switch-on time of a control switch during the falling time so that the majority of the switch-on time during a mains period occurs during the falling time, to thereby control the current received by the converter to compensate for current received by the intermediate filter. Some embodiments may employ a feedback system to produce one or more error signals that modify the control signal used to control the operation of the converter. Various embodiments may also include additional stages that limit the compensation range of the error signal.

First claim

What is claimed is:

1. A circuit configured to control power delivered to a load by an AC/DC power converter, the AC/DC power converter configured to receive a mains alternating current (AC) voltage as an input, the mains AC voltage having a mains voltage cycle of an absolute voltage value varying in a cyclic manner from a first zero to a second zero over a cycle period, the cycle period having a first half-cycle period during which the absolute voltage value increases from the first zero to a maximum, and a second half-cycle period during which the absolute voltage value decreases from the maximum to the second zero, the circuit comprising:
a rectifier configured to receive the mains AC voltage and produce a direct-current (DC) voltage;
a switched mode power supply (SMPS) configured to receive the DC voltage, produce an output voltage, and provide the output voltage and a drive current to the load, the SMPS including a control switch, being switchable between an ON and an OFF state and only conducting during said ON state to control the output voltage and drive current delivered to the load;
a filter configured to receive a filter current;
a feedback control circuit configured to drive the control switch between the ON and OFF states, wherein the feedback control circuit shifts the drive current relative to the mains voltage cycle by generating a error signal based on a difference between a reference mains current signal and a sensed current signal at an output of the rectifier, and modifying the drive current based on the error signal so that the reference mains current signal and the sensed current signal have current shapes based upon an input desired mains current shape;
a first scaling unit configured to receive the error signal and a power level signal based on the output voltage and produce a control input to control the drive current;
a second scaling unit configured to receive the reference mains current signal and the power level signal based on the output voltage and produce an adapted reference mains current signal; and
an averaging circuit configured to receive a plurality of error signals during a defined period of at least the first or second half-cycle periods of the mains AC voltage and produce an average error signal based on an average of the plurality of error signals received during the defined period, wherein the feedback control circuit modifies the drive current based on the average error signal.

2. The circuit of claim 1 , wherein the first and the second scaling units comprise multipliers.

3. The circuit of claim 1 , further comprising:
an output regulator that is configured to control the power level based on receiving the output voltage.

4. The circuit of claim 1 , wherein the second scaling unit is configured to receive the reference mains current signal and the average error signal and produce the adapted reference mains current signal.

5. The circuit of claim 1 , further comprising:
an adder configured to receive the sensed current and the reference mains current signal and produce the error signal.

6. The circuit of claim 1 , further comprising:
a clamp circuit configured to receive the error signal and modify the error signal to a minimum or maximum value within a defined operating range when a value of the received error signal is outside of the defined operating range.

7. The circuit of claim 1 , wherein the feedback control circuit is configured to derive the reference mains current signal from the voltage produced at an output of the rectifier.

8. The circuit of claim 1 , wherein the feedback control circuit is configured to derive the reference mains current signal from the mains AC voltage.

9. The circuit of claim 1 , further comprising:
an adder configured to receive the adapted reference mains current signal and produce the error signal.

Assignees

• Zhang Cheng
• Halberstadt Hans
• Nxp Bv

Inventors

• Zhang Cheng
• Halberstadt Hans

Classifications

• G05F5/00

  Systems for regulating electric variables by detecting deviations in the electric input to the system and thereby controlling a device within the system to obtain a regulated output · CPC title

• H02M2001/0025

  Electricity · mapped topic

• Y02B70/126

  Cross-Sectional Technologies · mapped topic

• Y02B70/16

  Cross-Sectional Technologies · mapped topic

• H02M1/4225 Primary

  using a non-isolated boost converter · CPC title