Semiconductor switch, wireless apparatus, and method of designing semiconductor switch

Patent metadata

Field	Value
Publication number	US-9530797-B2
Application number	US-201514634866-A
Country	US
Kind code	B2
Filing date	Mar 1, 2015
Priority date	May 29, 2014
Publication date	Dec 27, 2016
Grant date	Dec 27, 2016

Abstract

A semiconductor switch on a SOI substrate that includes a supporting substrate, an insulating layer on the supporting substrate, and a semiconductor layer provided on the insulating layer, includes a first and a second through FET groups, each including a plurality of field effect transistors connected in series between a common node and a first and second node, respectively. The first through FET group has an area equal to or less than an area Sfet, which is calculated by using an equivalent circuit including a resistance that represents leakage of a high frequency signal from the first through FET group to the supporting substrate.

First claim

What is claimed is:

1. A semiconductor switch on an SOI substrate that includes a supporting substrate, an insulating layer on the supporting substrate, and a semiconductor layer provided on the insulating layer, the semiconductor switch comprising:
a first through FET group and a second through FET group, each including a plurality of field effect transistors connected in series between a common node and, respectively, a first or a second node, wherein
an area of the first through FET group is equal to or less than an area Sfet, wherein
the area Sfet is a function of an on-state resistance Ron of the first through FET group in a conductive state, a sum Ctotal of off-capacitances of any through FET groups in the semiconductor switch in a non-conductive state, and resistivity ρs of the supporting substrate, and the area Sfet satisfies:
area Sfet≦( a−b ×Ron− c ×Ctotal 2 −d /ρs)/( e+f /ρs),

where a unit of the resistivity ρs is in Ωcm, a unit of the on-state resistance Ron is in Ω, a unit of the sum Ctotal of the off-capacitances is in pF, a unit of the area Sfet in cm 2 , and a, b, c, d, e, and f are constants.

2. The semiconductor switch according to claim 1 , wherein the area Sfet satisfies:
area Sfet≦(1.08−0.11×Ron−1.1×Ctotal 2 −160/ρs)/(2+4.5×10 4 /ρs).

3. The semiconductor switch according to claim 1 , wherein the area Sfet is less than or equal to 0.027 cm 2 .

4. The semiconductor switch according to claim 1 , wherein a gate width of each field effect transistor in the first through FET group is less than or equal to 6.3 mm.

5. The semiconductor switch according to claim 4 , wherein the gate width of each field effect transistor in the first through FET group is equal to or greater than 0.4 mm.

6. The semiconductor switch according to claim 1 , wherein the first through FET and the second through FET have equal areas.

7. The semiconductor switch according to claim 1 , wherein the semiconductor switch is a single pole double throw (SPDT) switch.

8. The semiconductor switch according to claim 1 , wherein the semiconductor switch is a single pole n-throw (SPnT) switch that includes n total through FET groups each including a plurality of field effect transistors connected in series between the common node and, respectively, an n th node, where n is 3 or more.

9. A wireless apparatus, comprising:
an antenna for transmitting or receiving a radio signal;
a semiconductor switch on an SOI substrate that includes a supporting substrate, an insulating layer on the supporting substrate, and a semiconductor layer provided on the insulating layer, the semiconductor switch comprising:
a first through FET group and a second through FET group, each including a plurality of field effect transistors connected in series between a common node connected to the antenna and, respectively, a first node or a second node, wherein an area of the first through FET group is equal to or less than an area Sfet, and the common node is connected to the antenna, wherein the area Sfet is a function of an on-state resistance Ron of the first through FET group in a conductive state, a sum Ctotal of off-capacitances of any through FET groups in the semiconductor switch in a non-conductive state, and a resistivity ρs of the supporting substrate, and the area Sfet satisfies:
area Sfet≦(a−b×Ron−c×Ctotal 2 −d/ρs)/(e+f/ρs), where a unit of the resistivity ρs is in Ωcm, a unit of the on-state resistance Ron is in Ω, a unit of the sum Ctotal of the off-capacitances is in pF, a unit of the area Sfet in cm 2 , and a, b, c, d, e, and f are constants;
a transmitting circuit that is connected to the first node of the semiconductor switch and is configured to transmit the radio signal; and
a receiving circuit that is connected to the second node of the semiconductor switch and is configured to receive the radio signal.

10. The wireless apparatus according to claim 9 , wherein the semiconductor switch is a single pole double throw (SPDT) switch.

11. The wireless apparatus according to claim 9 , wherein the semiconductor switch is a single pole n-throw (SPnT) switch that includes n total through FET groups each including a plurality of field effect transistors connected in series between the common node and, respectively, an n th node, where n is 3 or more.

12. The wireless apparatus according to claim 11 , wherein a gate width of each field effect transistor in the through FET groups is:
3.6 mm or less when n is one of 3, 4, 5, and 6,
2.8 mm or less when n is one of 7 and 8,
2.3 mm or less when n is one of 9 and 10,
1.9 mm or less when n is one of 11 and 12, and
1.3 mm or less when n is one of 13, 14, 15, and 16.

13. The wireless apparatus according to claim 9 , wherein a gate width of each field effect transistor in the first through FET group is in a range from 6.3 mm to 0.4 mm, inclusive.

14. The semiconductor switch according to claim 9 , further including:
a first shunt transistor group connected to ground potential and a node that is between the first node and the first through FET group; and
a second shunt transistor group connected ground potential and a node between the second node and the second through FET group.

15. A semiconductor switch on an SOI substrate that includes a supporting substrate, an insulating layer on the supporting substrate, and a semiconductor layer on the insulating layer, the semiconductor switch comprising:
a first through FET group and a second through FET group, each comprising a plurality of field effect transistors connected in series between a common node and, respectively, a first or a second node;
a first shunt transistor group connected to ground potential and a node that is between the first node and the first through FET group; and
a second shunt transistor group connected to ground potential and a node that is between the second node and the second through FET group, wherein
an area of the first through FET group is equal to or less than an area Sfet that is calculated using an equivalent circuit including a resistance Rs that represents resistance to leakage of a high frequency signal from the first through FET group to the supporting substrate.

16. The semiconductor switch according to claim 15 , wherein the area Sfet is 0.027 cm 2 or less.

Assignees

• Toshiba Kk

Inventors

• Kunishi Yugo
• Seshita Toshiki

Classifications

• H10D86/201 Primary

  the substrates comprising an insulating layer on a semiconductor body, e.g. SOI (H10D86/40 take precedence) · CPC title

• H01L27/1203 Primary

  Electricity · mapped topic

• H03K17/687 Primary

  the devices being field-effect transistors · CPC title