Integrated circuit with electrostatic discharge protection
US-2024395801-A1 · Nov 28, 2024 · US
US9530769B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9530769-B2 |
| Application number | US-201614995706-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jan 14, 2016 |
| Priority date | Mar 9, 2011 |
| Publication date | Dec 27, 2016 |
| Grant date | Dec 27, 2016 |
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Official abstract text for this publication.
A semiconductor device includes a semiconductor substrate on which a semiconductor device is formed; first and second pads; a first insulating film which is formed above the semiconductor substrate; a plurality of wiring lines which are embedded in ditches provided in the first insulating film; a second insulating film provided to cover the first insulating film and the plurality of wiring lines; a semiconductor layer formed on the second insulating film; a source electrode connected with the semiconductor layer; and a drain electrode connected with the semiconductor layer. The plurality of wiring lines includes a gate electrode provided in a position which is opposite to the semiconductor layer. The semiconductor layer, the source electrode, the drain electrode and the gate electrode configure an ESD protection device to discharge a current by ESD surge from the first pad to the second pad.
Opening claim text (preview).
What is claimed is: 1. A semiconductor device comprising: a semiconductor substrate having a main surface; a first transistor formed on the main surface of the semiconductor substrate; a first insulating film formed over the first transistor; a second insulating film formed over the first insulating film; and a second transistor formed over the first transistor in the main surface and over the first insulating film and formed in the second insulating film, wherein the se…
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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