Package substrate and semiconductor package including the same
US-2024429153-A1 · Dec 26, 2024 · US
US9530739B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9530739-B2 |
| Application number | US-201514609289-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jan 29, 2015 |
| Priority date | Dec 15, 2014 |
| Publication date | Dec 27, 2016 |
| Grant date | Dec 27, 2016 |
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A package on package (PoP) device includes a first package and a second package. The first package includes a first package substrate, a die coupled to the first package substrate, an encapsulation layer located on the first package substrate, and an inter package connection coupled to the first package substrate. The inter package connection is located in the encapsulation layer. The inter package connection includes a first interconnect configured to provide a first electrical path for a reference ground signal, and a second set of interconnects configured to provide at least one second electrical path for at least one second signal. The first interconnect has a length that is at least about twice as long as a width of the first interconnect. The second set of interconnects is configured to at least be partially coupled to the first interconnect by an electric field.
Opening claim text (preview).
What is claimed is: 1. An integrated device package comprising: a first package substrate; a first die coupled to the first package substrate; an encapsulation layer located on the first package substrate; and an inter package connection coupled to the first package substrate, the inter package connection located at least partially in the encapsulation layer, the inter package connection comprising: a first interconnect providing a first electrical path for a reference grou…
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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