Semiconductor device and manufacturing method thereof

US9530723B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9530723-B2
Application numberUS-201514862102-A
CountryUS
Kind codeB2
Filing dateSep 22, 2015
Priority dateSep 25, 2014
Publication dateDec 27, 2016
Grant dateDec 27, 2016

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  1. Title

    What the patent document calls the invention.

  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

On the assumption that a pair of hanging parts is provided in a lead frame and a clip includes a main body part and a pair of extension parts, the pair of the extension parts is mounted and supported on the pair of the hanging parts. Accordingly, the clip is mounted on a lead (one point) and the pair of the hanging parts (two points), and the clip is supported by the three points.

First claim

Opening claim text (preview).

What is claimed is: 1. A manufacturing method of a semiconductor device, comprising: (a) a step of preparing a chip mounting part; (b) a step of preparing a lead frame including a lead and a hanging part; (c) a step of preparing a metal plate including a main body part and an extension part; (d) a step of mounting a semiconductor chip on an upper surface of the chip mounting part via a first conductive adhesive; (e) after the step (d), a step of arranging the lead frame above the chip mounting part on which the semiconductor chip is mounted; (f) after the step (e), a step of arranging the main body part of the metal plate via a second conductive adhesive so as to overlap an electrode pad of the semiconductor chip and a part of the lead when seen in a plan view and arranging the extension part of the metal plate on the hanging part of the lead frame; and (g) after the step (f), a step of forming a sealing member by sealing the semiconductor chip. 2. The manufacturing method of a semiconductor device according to claim 1 , wherein, in the step (f), the extension part of the metal plate is supported by the hanging part of the lead frame. 3. The manufacturing method of a semiconductor device according to claim 1 , wherein, in the step (f), the extension part of the metal plate is fixed to the hanging part of the lead frame. 4. The manufacturing method of a semiconductor device according to claim 3 , wherein a notch part is provided in the hanging part of the lead frame, a projection part is provided in the extension part of the metal plate, and the extension part of the metal plate is fixed by pressing the projection part to the notch part. 5. The manufacturing method of a semiconductor device according to claim 3 , wherein a groove part is provided in the hanging part of the lead frame, a projection part is provided in the extension part of the metal plate, and the extension cart of the metal plate is fixed by inserting the projection part into the groove part. 6. The manufacturing method of a semiconductor device according to claim 1 , wherein, in the step (f), the extension part of the metal plate is supported to the hanging part of the lead frame by an intersecting portion of the hanging part and the extension part. 7. The manufacturing method of a semiconductor device according to claim 6 , wherein, in the step (g), the intersecting portion exists inside the sealing member. 8. The manufacturing method of a semiconductor device according to claim 7 , wherein the extension part of the metal plate is enclosed in the chip mounting part when seen in a plan view, and the hanging part of the lead frame partially overlaps the chip mounting part when seen in a plan view. 9. The manufacturing method of a semiconductor device according to claim 8 , wherein, in the hanging part of the lead frame, a bent part for ensuring a space is formed in a region that partially overlaps the chip mounting part. 10. The manufacturing method of a semiconductor device according to claim 9 , wherein, in the step (g), the sealing member is formed in a state in which a pin is pressed to the space ensured in the chip mounting part. 11. The manufacturing method of a semiconductor device according to claim 9 , wherein the lead frame further includes a signal lead, the semiconductor chip further includes a signal electrode pad, and after the step (f) and before the step (g), the method further comprises: (h) a step of connecting the signal electrode pad and the signal lead by a wire in a state in which the chip mounting part is fixed with a jig by pressing the jig to the space ensured in the chip mounting part. 12. The manufacturing method of a semiconductor device according to claim 6 , wherein, in the step (g), the intersecting portion exists outside the sealing member. 13. The manufacturing method of a semiconductor device according to claim 12 , wherein the extension part of the metal plate partially protrudes from the chip mounting part when seen in a plan view, and the hanging part of the lead frame does not overlap the chip mounting part when seen in a plan view. 14. The manufacturing method of a semiconductor device according to claim 13 , wherein the hanging part of the lead frame is a framework of the lead frame. 15. The manufacturing method of a semiconductor device according to claim 1 , wherein the hanging part of the lead frame extends in an extending direction of the lead, and the extension part of the metal plate extends in a direction intersecting with the extending direction of the lead.

Assignees

Inventors

Classifications

  • comprising aluminium [Al] · CPC title

  • changes in shapes · CPC title

  • between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

  • comprising gold [Au] · CPC title

  • Encapsulations, e.g. protective coatings · CPC title

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Frequently asked questions

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What does patent US9530723B2 cover?
On the assumption that a pair of hanging parts is provided in a lead frame and a clip includes a main body part and a pair of extension parts, the pair of the extension parts is mounted and supported on the pair of the hanging parts. Accordingly, the clip is mounted on a lead (one point) and the pair of the hanging parts (two points), and the clip is supported by the three points.
Who is the assignee on this patent?
Renesas Electronics Corp
What technology area does this patent fall under?
Primary CPC classification H10W90/811. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 27 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).