Signal analysis circuit and signal analysis method thereof

Patent metadata

Field	Value
Publication number	US-9529023-B2
Application number	US-201514961905-A
Country	US
Kind code	B2
Filing date	Dec 8, 2015
Priority date	Dec 16, 2014
Publication date	Dec 27, 2016
Grant date	Dec 27, 2016

Abstract

A signal analysis circuit and a signal analysis method thereof are disclosed. The signal analysis circuit includes a peak detector, a subtraction amplifying unit, and a compare unit. The peak detector obtains a peak value of a first voltage signal to generate a second voltage signal. The subtraction amplifying unit generates a compare voltage signal according to the second voltage signal, and amplifies a voltage value difference between the second voltage signal and the compare voltage signal to generate a third voltage signal. A peak-to-peak value of the third voltage signal is larger than a peak-to-peak value of the second voltage signal. The compare unit compares the voltage value of the third voltage signal and the voltage value of the compare voltage signal to generate an output voltage signal. In such a manner, a new signal analysis circuit can be realized.

First claim

What is claimed is:

1. A signal analysis circuit, comprising:
a peak detector configured to receive a first voltage signal and obtain a peak value of the first voltage signal to generate a second voltage signal;
a subtraction amplifying unit configured to generate a compare voltage signal according to the second voltage signal, and amplifying a voltage value difference between the second voltage signal and the compare voltage signal to generate a third voltage signal, wherein a peak-to-peak value of the third voltage signal is larger than a peak-to-peak value of the second voltage signal; and
a compare unit electrically connected to the subtraction amplifying unit and configured to compare a voltage value of the third voltage signal and a voltage value of the compare voltage signal to generate an output voltage signal.

2. The signal analysis circuit according to claim 1 , wherein the signal analysis circuit includes:
a rectifying unit configured to receive an input signal and rectifying the input signal to generate the first voltage signal.

3. The signal analysis circuit according to claim 1 , wherein the peak detector includes:
an operation amplifier including a first input end of the operation, amplifier configured to receive the first voltage signal, an output end of the operation amplifier configured to output the second voltage signal, and a second input end of the operation amplifier electrically connected to the output end;
a capacitor electrically connected to the second input end of the operation amplifier; and
a resistor electrically connected to the capacitor.

4. The signal analysis circuit according to claim 3 , wherein the peak detector includes:
a diode electrically connected between the output end of the operation amplifier and a node with the second voltage signal.

5. The signal analysis circuit according to claim 1 , wherein the signal analysis circuit includes:
a buffer unit electrically connected between the peak detector and the subtraction amplifying unit.

6. The signal analysis circuit according to claim 1 , wherein the subtraction amplifying unit includes:
a subtraction amplifier including a first input end of the subtraction amplifier configured to receive the second voltage signal, a second input end of the subtraction amplifier configured to receive the compare voltage signal, and an output end of the subtraction amplifier configured to output the third voltage signal.

7. The signal analysis circuit according to claim 6 , wherein the subtraction amplifying unit includes:
a low-pass filter configured to filter the second voltage signal to generate the compare voltage signal.

8. The signal analysis circuit according to claim 6 , wherein the compare unit includes:
a hysteresis comparator including a first input end of the hysteresis comparator electrically connected to the output end of the subtraction amplifier, a second input end of the hysteresis comparator electrically connected to the second input end of the subtraction amplifier, and an output end of the subtraction amplifier configured to output the output voltage signal.

9. A signal analysis method, comprising following steps:
obtaining a peak value of a first voltage signal by a peak detector to generate a second voltage signal;
generating a compare voltage signal according to the second voltage signal;
amplifying a voltage value difference between the second voltage signal and the compare voltage signal to generate a third voltage signal, wherein a peak-to-peak value of the third voltage signal is larger than a peak-to-peak value of the second voltage signal; and
comparing a voltage value of the third voltage signal and a voltage value of the compare voltage signal to generate an output voltage signal.

10. The signal analysis method according to claim 9 , wherein the step of comparing the voltage value of the third voltage signal and the voltage value of the compare voltage signal to generate the output voltage signal includes that:
the output voltage signal is at a first level when the voltage value of the third of voltage signal is larger than the voltage value of the compare voltage signal; and
the output voltage signal is at a second level when the voltage value of the third voltage signal is smaller than the voltage value of the compare voltage signal, wherein the second level is lower than the first level.

Assignees

• Asustek Comp Inc

Inventors

• Tu Wei-Chen
• Huang Yi-Ming
• Tsai Ming-Ting
• Hung Hsiang-Jui

Classifications

• G01R19/04 Primary

  Measuring peak values {or amplitude or envelope} of AC or of pulses · CPC title