Circuit and method for sensing a differential capacitance

Patent metadata

Field	Value
Publication number	US-9529020-B2
Application number	US-201514657621-A
Country	US
Kind code	B2
Filing date	Mar 13, 2015
Priority date	Apr 29, 2011
Publication date	Dec 27, 2016
Grant date	Dec 27, 2016

Abstract

A circuit and a method for sensing differential capacitance involve using plural storing capacitors to repeatedly sample charges of the differential capacitance in an over-sampling manner, and storing the charges sampled in different transfer rounds into different storing capacitors instead of repeatedly transferring charges for a single storing capacitor, so as to collect charge averages about both inputs and noises and in turn effectively reduce RF interference and source noises.

First claim

What is claimed is:

1. A circuit for sensing a differential capacitance, comprising:
a first sensing terminal and a second sensing terminal connected to two terminals of the differential capacitance;
a switching circuit connected to the first and second sensing terminals, for being switched to cause the two terminals of the differential capacitance either to be connected to one of a high-voltage source and a low-voltage source for charge sampling or to perform charge transfer;
a charge-storing circuit coupled to the switching circuit for storing charges transferred by the differential capacitance in response to a switching of the switching circuit, the charge-storing circuit comprising:
a first storing circuit for storing charges sampled at one terminal of the differential capacitance into a first storing capacitor;
a second storing circuit for storing charges sampled at the other terminal of the differential capacitance into a second storing capacitor; and
a third storing circuit including a plurality of third storing capacitors, each said third storing capacitor having two terminals connected to the first and second storing circuits, respectively, the third storing circuit sequentially storing charges in the first and second storing circuits in different transfer rounds into a different one of said third storing capacitors, and connecting the plural third storing capacitors in parallel so as to generate a first output voltage and a second output voltage at two terminals thereof; and
an amplifier stage generating a sensing value according to a difference between the first and second output voltages;
wherein the first storing capacitor is coupled to the two terminals of the differential capacitance by the switching circuit; and
wherein the second storing capacitor is coupled to the two terminals of the differential capacitance by the switching circuit.

2. The circuit of claim 1 , wherein the switching circuit comprises:
a first switch pair connected to the first sensing terminal, comprising first upper-bridge and lower-bridge switches connected to the high-voltage source and the low-voltage source, respectively;
a second switch pair connected to the second sensing terminal, comprising second upper-bridge and lower-bridge switches connected to the high-voltage source and the low-voltage source, respectively;
a third switch pair connected to the first storing circuit, so as to make the first storing circuit connected to one or both of the first sensing terminal and the second sensing terminal, thereby allowing the charges to be transferred; and
a fourth switch pair connected to the second storing circuit, so as to make the second storing circuit connected to one or both of the first sensing terminal and the second sensing terminal, thereby allowing the charges to be transferred.

3. The circuit of claim 1 , wherein the amplifier stage comprises:
an operational amplifier having a positive input terminal connected to a common reference-voltage source;
a first switch for inputting the first output voltage;
a second switch for inputting the second output voltage;
a first sampling capacitor having one terminal connected to a negative input terminal of the operational amplifier and an opposite terminal connected to the first and second switches;
a third switch connected between the negative input terminal and the output terminal of the operational amplifier; and
a second sampling capacitor having one terminal connected to the negative input terminal of the operational amplifier and an opposite terminal connected to the common reference-voltage source or the output terminal of the operational amplifier through a fourth switch and a fifth switch.

4. The circuit of claim 1 , wherein the amplifier stage is a multistage amplifier.

5. The circuit of claim 4 , wherein the multistage amplifier comprises:
a differential amplifier stage generating an amplification signal according to an average of plural said differences; and
an impedance conversion stage generating the sensing value according to the amplification signal.

6. A method for sensing a differential capacitance, comprising steps of:
A.) switching a switching circuit to cause two terminals of the differential capacitance either to get connected to one of a high-voltage source and a low-voltage source for charge sampling or to perform charge transfer;
B.) storing charges sampled at one of the two terminals of the differential capacitance into a first storing capacitor;
C.) storing charges sampled at the other terminal of the differential capacitance into a second storing capacitor;
D.) sequentially storing charges in the first and second storing circuits in different transfer rounds into a different one of a plurality of third storing capacitors, and connecting the third storing capacitors in parallel so as to generate a first output voltage and a second output voltage at two terminals of the parallel-connected third storing capacitors; and
E.) generating a sensing value according to a difference between the first and second output voltages;
wherein the first storing capacitor is coupled to the two terminals of the differential capacitance by the switching circuit; and
wherein the second storing capacitor is coupled to the two terminals of the differential capacitance by the switching circuit.

7. The method of claim 6 , wherein the step E comprises steps of:
resetting a first sampling capacitor while storing a non-ideal error of the operational amplifier through a negative input terminal of the operational amplifier into a second sampling capacitor;
using the first sampling capacitor to sample the first output voltage; and
using the first sampling capacitor to sample the second output voltage, and making the second sampling capacitor connected between the negative input terminal and an output terminal of the operational amplifier, so as to generate the sensing value related to the difference between the first and second output voltages.

8. The method of claim 6 , wherein the step E comprises steps of:
generating an amplification signal according to the first and second output voltages; and
generating the sensing value according to the amplification signal.

Assignees

• Elan Microelectronics Corp
• Elan Microelectronics Corp

Inventors

• Yang Chao-Chi
• Peng Shih-How

Classifications

• G01D5/24 Primary

  by varying capacitance · CPC title

• G01R17/02 Primary

  Arrangements in which the value to be measured is automatically compared with a reference value · CPC title