Methods of and apparatus for measuring metal cleanliness

US9528956B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9528956-B2
Application numberUS-201615130530-A
CountryUS
Kind codeB2
Filing dateApr 15, 2016
Priority dateMar 12, 2013
Publication dateDec 27, 2016
Grant dateDec 27, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  7. Citations and related patents

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Abstract

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Methods and apparatus for measuring the cleanliness of molten metals. Direct current is passed between electrodes through molten metal advancing through a passage in an electrically resistive wall. A voltage signal is analyzed for the presence of solid generally non-metallic inclusions in the metal. Direct current is supplied by one or more ultra-capacitors and the decay in discharge voltage of the capacitor(s) is compensated for by passing the current from each capacitor through a resistor ladder network circuit having resistors connected in parallel. Individual resistors are switched on or off in a sequence effective to change the resistance of the circuit and maintain the current within a predetermined range. Heat generation and noise pick-up are minimized by maintaining a low discharge voltage and measurement current while using FETs only in the fully ON or OFF conditions to switch the resistors into or out of the circuits.

First claim

Opening claim text (preview).

What is claimed is: 1. Apparatus for measuring cleanliness of a molten metal, the apparatus comprising: one or more rechargeable ultra-capacitors operable at a discharge voltage of 2.7 volts or less; a metal cleanliness probe having an interior, a wall made of electrically resistive material and a passage in the wall interconnecting the interior with an exterior of the probe to allow molten metal to pass therethrough, wherein an interior electrode is positioned in the interior of the probe and an exterior electrode is positioned outside the probe; a device registering voltage across the interior electrode and the exterior electrode and generating a voltage signal; for each of the one or more ultra-capacitors, an associated resistor ladder network circuit interconnecting its associated ultra-capacitor with one of the interior electrode and the exterior electrode, each resistor ladder network circuit comprising two or more resistors connected in parallel to each other, each resistor being in a circuit leg including one or more field effect transistors capable of being switched directly between a non-conductive OFF condition and a fully conductive ON condition, wherein each resistor ladder network circuit has resistance values effective to maintain a measurement current of no more than 100 amps through molten metal present in the passage when the circuit is exposed to the discharge voltage from the one or more ultra-capacitors, and wherein the one or more ultra-capacitors, each associated resistor ladder network circuit, the interior electrode, and the exterior electrode are arranged such that all discharged energy from the one or more ultra-capacitors that passes through the passage and through the interior electrode also passes through the exterior electrode; and a controller adapted for individually switching the field effect transistors of the circuit legs of the or each resistor ladder network circuit between the non-conductive OFF condition and the fully conductive ON condition according to a sequence effective for maintaining the measurement current within a pre-determined current range at least for a time required for measurement of cleanliness of the molten metal. 2. The apparatus of claim 1 , wherein the field effect transistor or transistors of each of the circuit legs are surface mounted field effect transistors. 3. The apparatus of claim 2 , wherein the field effect transistor or transistors of each of the circuit legs introduce a resistance of less than 1 milli-ohm into the circuit leg when in the fully conductive ON condition. 4. The apparatus of claim 3 , wherein at least one circuit leg includes two or more of the field effect transistors, and wherein the two or more field effect transistors are connected in parallel to each other. 5. The apparatus of claim 1 , wherein the resistors of each resistor ladder network circuit have resistance values that differ from each other, and wherein the controller is programmed to switch the field effect transistors of the circuit legs to first turn on a circuit leg of lowest resistance, and then to turn on one or more circuit legs of higher resistance as the discharge voltage of the at least one ultra-capacitor declines during the time required for measurement. 6. The apparatus of claim 5 , wherein each resistor ladder network circuit has three or more circuit legs and the controller is programmed to turn on the circuit legs according to a binary sequence effective to maintain the measurement current within the pre-determined current range. 7. The apparatus of claim 6 , wherein the resistors each have a resistance value within a range of 0.02 to 2.64 ohms. 8. The apparatus of claim 1 , further comprising a device measuring the measurement current and generating a signal alerting the controller when the current falls to a lower limit of the pre-determined current range. 9. The apparatus of claim 1 , further comprising a voltage signal analyzer adapted to determine metal cleanliness from the signal from the device registering voltage. 10. The apparatus claim 1 , further comprising a charger for charging the one or more of the rechargeable ultra-capacitors. 11. The apparatus of claim 1 , having a single ultra-capacitor and a single associated resistor ladder network circuit. 12. The apparatus of claim 1 , having two or more ultra-capacitors and two or more associated resistor ladder network circuits. 13. The apparatus of claim 12 , further comprising a switchable circuit connecting the ultra-capacitors in series and by-passing the resistor ladder network circuits to connect the series-connected ultra-capacitors across the interior and exterior electrodes for purging the passage. 14. The apparatus of claim 1 , further comprising a switchable circuit by-passing each resistor ladder network circuit and connecting each ultra-capacitor directly across the interior electrode and the exterior electrode for purging the passage. 15. The apparatus of claim 1 , wherein the at least two electrodes consist only of the internal electrode and the external electrode. 16. A method of measuring cleanliness of a molten metal, the method comprising: charging at least one ultra-capacitor to a voltage of 2.7 volts or less; advancing molten metal through a passage in a wall made of electrically resistive material between an interior and an exterior of a metal cleanliness probe; discharging the at least one ultra-capacitor, via a resistor ladder network circuit associated with each ultra-capacitor, through the molten metal advancing through the passage between an interior electrode positioned in the interior of the probe and an exterior electrode positioned outside the probe, wherein all discharged energy from the at least one ultra-capacitor that passes through the passage and through the interior electrode also passes through the exterior electrode, wherein each resistor ladder network circuit comprises two or more resistors connected in parallel to each other, each resistor being in a circuit leg including one or more field effect transistors capable of being switched directly between a non-conductive OFF condition and a fully conductive ON condition, each resistor ladder network having resistance values effective to maintain a measurement current of no more than 100 amps through the molten metal advancing through the passage; switching the field effect transistors of the circuit legs of each resistor ladder network circuit between the non-conductive OFF condition and the fully conductive ON condition according to a sequence for maintaining the measurement current within a pre-determined current range at least for a time required for measurement of cleanliness of the molten metal; and registering voltage across the internal electrode and the external electrode during the time required for measurement, generating a voltage signal and determining cleanliness of the molten metal from the voltage signal. 17. The method of claim 16 , wherein each resistor ladder network circuit has three or more circuit legs and the individual switching of the field effect transistors of the circuit legs of each resistor ladder network ladder circuit is carried out according to a binary sequence to maintain the measurement current within the pre-determined current range. 18. The method of claim 16 , wherein the sequence is pre-determined according to a calibration routine and recorded for use during the time required for measurement of cleanliness of the molten metal. 19. The method of claim 16 , wherein the at least one ultra-capacitor i

Assignees

Inventors

Classifications

  • G01N27/07Primary

    Construction of measuring vessels; Electrodes therefor · CPC title

  • Physics · mapped topic

  • using electric, e.g. electrostatic methods or magnetic methods (by investigating individual particles G01N15/1031, G01N15/12) · CPC title

  • in liquids, e.g. trouble · CPC title

  • of a liquid (involving electrolysis G01N27/26) · CPC title

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What does patent US9528956B2 cover?
Methods and apparatus for measuring the cleanliness of molten metals. Direct current is passed between electrodes through molten metal advancing through a passage in an electrically resistive wall. A voltage signal is analyzed for the presence of solid generally non-metallic inclusions in the metal. Direct current is supplied by one or more ultra-capacitors and the decay in discharge voltage of…
Who is the assignee on this patent?
Novelis Inc
What technology area does this patent fall under?
Primary CPC classification G01N27/07. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Dec 27 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).