Self-adapting phase-locked loop filter for use in a read channel

Patent metadata

Field	Value
Publication number	US-9525576-B1
Application number	US-201514808736-A
Country	US
Kind code	B1
Filing date	Jul 24, 2015
Priority date	Jul 24, 2015
Publication date	Dec 20, 2016
Grant date	Dec 20, 2016

Abstract

A phase-locked loop (PLL) filter of a read channel includes a filter portion having an input coupled to delay circuitry having an output. The input of the filter portion is configured to receive a phase error signal. A look-up table is coupled to the filter portion. The look-up table comprises phase coefficients and frequency coefficients associated with a plurality of phase error magnitudes. The look-up table is configured to provide one or both of a selected phase coefficient and a selected frequency coefficient based on a magnitude of the phase error signal. The PLL filter is configured to adjust a bandwidth of the filter portion using one or both of the selected phase coefficient and the selected frequency coefficient. A phase signal indicative of estimated phase disturbance is produced at the output of the delay circuitry.

First claim

What is claimed is:

1. An apparatus, comprising:
a phase-locked loop (PLL) filter of a read channel comprising a filter portion having an input coupled to delay circuitry having an output, the input of the filter portion configured to receive a phase error signal;
a look-up table coupled to the filter portion, the look-up table comprising phase coefficients and frequency coefficients associated with a plurality of phase error magnitudes, the look-up table configured to provide one or both of a selected phase coefficient and a selected frequency coefficient based on a magnitude of the phase error signal; and
the PLL filter configured to adjust a bandwidth of the filter portion using one or both of the selected phase coefficient and the selected frequency coefficient;
wherein a phase signal indicative of estimated phase disturbance is produced at the output of the delay circuitry, the filter portion comprises a low pass filter configured to receive the phase error signal, and an output of the low pass filter is coupled to an input of the look-up table.

2. The apparatus of claim 1 , wherein:
the low pass filter is configured to produce an averaged magnitude and sign of the phase error signal.

3. The apparatus of claim 1 , wherein:
the low pass filter is configured to produce an averaged magnitude and sign of the phase error signal; and
the look-up table is configured to determine one or both of the selected phase coefficient and the selected frequency coefficient using the averaged magnitude and sign of the phase error signal.

4. The apparatus of claim 1 , wherein:
the look-up table comprises a maximum phase coefficient and a maximum frequency coefficient; and
the look-up table is configured to provide one or both of the maximum phase coefficient and the maximum frequency coefficient in response to the phase error signal exceeding a maximum phase error signal for which phase and frequency coefficients are available in the look-up table.

5. The apparatus of claim 1 , wherein:
the filter portion is configured to operate on a phase error signal indicative of a mode hop; and
the look-up table contains phase coefficients and frequency coefficients for responding to the mode hop.

6. A method, comprising:
receiving a phase error signal by a phase-locked loop (PLL) filter of a read channel;
selecting from a look-up table one or both of a phase coefficient and a frequency coefficient based on a magnitude of the phase error signal;
determining, by the look-up table, one or both of the selected phase coefficient and a selected frequency coefficient using an averaged magnitude and sign of the phase error signal; and
adjusting a bandwidth of a filter portion of the PLL filter using one or both of the selected phase coefficient and the selected frequency coefficient.

7. The method of claim 6 , further comprising low pass filtering the received phase error signal.

8. The method of claim 7 , wherein low pass filtering the received phase error signal comprises producing the averaged magnitude and sign of the phase error signal.

9. The method of claim 6 , wherein:
the look-up table comprises a maximum phase coefficient and a maximum frequency coefficient; and
selecting comprises selecting one or both of the maximum phase coefficient and the maximum frequency coefficient from the look-up table in response to the phase error signal exceeding a maximum phase error signal for which phase and frequency coefficients are available in the look-up table.

10. The method of claim 6 , wherein:
a change in the phase error signal is indicative of a mode hop; and
selecting comprises selecting one or both a phase coefficient and a frequency coefficient for responding to the mode hop.

Assignees

• Seagate Technology Llc

Inventors

• Patapoutian Ara
• Derras Belkacem
• Radich William Michael
• Link Michael J
• Buch Bruce Douglas

Classifications

• H04L27/148 Primary

  using filters, including PLL-type filters · CPC title

• H04L7/0332

  with an integrator-detector · CPC title

• H04L7/033

  using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop · CPC title

• H03L7/1075 Primary

  by changing characteristics of the loop filter, e.g. changing the gain, changing the bandwidth (H03L7/1072 takes precedence) · CPC title

• H03L7/0807

  concerning mainly a recovery circuit for the reference signal · CPC title