Reconfigurable multi-mode transceiver

Patent metadata

Field	Value
Publication number	US-9525503-B2
Application number	US-201414513003-A
Country	US
Kind code	B2
Filing date	Oct 13, 2014
Priority date	May 28, 2014
Publication date	Dec 20, 2016
Grant date	Dec 20, 2016

Abstract

Reconfiguring a transceiver design using a plurality of frequency synthesizers and a plurality of carrier aggregation (CA) receiver (Rx) and transmitter (Tx) chains, the method including: connecting a first frequency synthesizer to a first CA Tx chain; connecting the plurality of frequency synthesizers to the plurality of CA Rx chains, wherein a second frequency synthesizer of the plurality of frequency synthesizers is connected as a shared synthesizer to a first CA Rx chain and a second CA Tx chain.

First claim

What is claimed is:

1. A method for reconfiguring a transceiver design using a plurality of frequency synthesizers and a plurality of carrier aggregation (CA) receiver (Rx) and transmitter (Tx) chains, the method comprising:
connecting a first frequency synthesizer to a first CA Tx chain,
wherein the first frequency synthesizer is configured to be used for the first CA Tx chain in one of a frequency division duplex (FDD) mode or time division duplex (TDD) mode;
connecting the plurality of frequency synthesizers to the plurality of CA Rx chains,
wherein a second frequency synthesizer of the plurality of frequency synthesizers is connected as a shared synthesizer to a first CA Rx chain and a second CA Tx chain,
wherein the shared synthesizer is configured to be used for one of the second CA Tx chain or the first CA Rx chain when the shared synthesizer is to drive a TDD chain or is in the FDD mode, and
wherein remaining frequency synthesizers are configured to be used for remaining Rx chains in one of the FDD mode or the TDD mode.

2. The method of claim 1 , wherein the transceiver includes at least: three CA Rx chains in the FDD mode; one CA Rx chain in TDD mode; one CA Tx chain in the FDD mode; and one CA Tx chain in the TDD mode.

3. The method of claim 1 , wherein the transceiver includes at least: four CA Rx chains in the TDD mode; and two CA Tx chains in the TDD mode.

4. The method of claim 1 , wherein the second CA Tx chain is disabled.

5. The method of claim 4 , wherein the transceiver includes at least: four CA Rx chains in the FDD mode; and one CA Tx chain in the FDD mode.

6. The method of claim 1 , wherein a second CA Rx chain is disabled.

7. The method of claim 6 , wherein the transceiver includes at least: three CA Rx chains in the FDD mode; and two CA Tx chain in the FDD mode.

8. The method of claim 1 , further comprising
enabling intra-band/contiguous receive CA to use a same synthesizer frequency with extended receive baseband filter (BBF) bandwidth to increase the number of downlink channels.

9. The method of claim 1 , further comprising
enabling intra-band/contiguous transmit CA to use a same synthesizer frequency with extended transmit baseband filter (BBF) bandwidth to increase the number of uplink channels.

10. The method of claim 1 , further comprising
enabling intra-band/non-contiguous CA by splitting an output of a low noise amplifier (LNA).

11. A reconfigurable transceiver circuit, comprising:
a first frequency synthesizer configured to connect to a first CA Tx chain,
wherein the first frequency synthesizer is configured to be used for the first CA Tx chain in one of an FDD mode or TDD mode;
a plurality of frequency synthesizers configured to connect to a plurality of CA Rx chains, wherein a second frequency synthesizer of the plurality of frequency synthesizers is connected as a shared synthesizer to a first CA Rx chain and a second CA Tx chain,
wherein the shared synthesizer is configured to be used for one of the second CA Tx chain or the first CA Rx chain when the shared synthesizer is to drive a TDD chain or is in the FDD mode, and
wherein remaining frequency synthesizers are configured to be used for remaining Rx chains in one of the FDD mode or the TDD mode.

12. The circuit of claim 11 , wherein: two of the remaining frequency synthesizers are configured to be used for two of the remaining Rx chains in the TDD mode; and one of the remaining frequency synthesizer is configured to be used for one of the remaining Rx chain in the FDD mode.

13. The circuit of claim 11 , wherein the second CA Tx chain is disabled.

14. The circuit of claim 11 , wherein a second CA Rx chain is disabled.

15. The circuit of claim 11 , further comprising
intra-band/contiguous receive CA configured to use same synthesizer frequency with extended receive baseband filter (BBF) bandwidth to increase the number of downlink channels.

16. The circuit of claim 11 , further comprising intra-band/contiguous transmit CA configured to use same synthesizer frequency with extended transmit baseband filter (BBF) bandwidth to increase the number of uplink channels.

17. The circuit of claim 11 , further comprising intra-band/non-contiguous CA configured to be enabled by splitting an LNA output.

18. The circuit of claim 11 , wherein the first frequency synthesizer, the first CA Tx chain, and the plurality of frequency synthesizers are disposed on a single-chip.

Assignees

• Qualcomm Inc

Inventors

• Narathong Chiewcharn
• Leung Lai Kan
• Pan Dongling
• Rangarajan Rajagopalan
• Wang Kevin Hsi-Huai
• Asuri Bhushan Shanti
• Tang Yiwu

Classifications

• H04B7/00

  Radio transmission systems, i.e. using radiation field (H04B10/00, H04B15/00 take precedence) · CPC title

• H04J4/00 Primary

  Combined time-division and frequency-division multiplex systems (H04J13/00 takes precedence {; data transmission H04L5/26; telemetry G08C15/00}) · CPC title

• H04B1/50

  using different frequencies for the two directions of communication · CPC title

• H04B1/54

  using the same frequency for two directions of communication (H04B1/44 takes precedence) · CPC title

• H04B1/403 Primary

  using the same oscillator for generating both the transmitter frequency and the receiver local oscillator frequency · CPC title