USB device for making I/O pin with intact voltage during charging procedure and related method

Patent metadata

Field	Value
Publication number	US-9525294-B2
Application number	US-201615132222-A
Country	US
Kind code	B2
Filing date	Apr 18, 2016
Priority date	May 11, 2010
Publication date	Dec 20, 2016
Grant date	Dec 20, 2016

Abstract

A universal serial bus device includes: a core circuit having a first pin and a second pin, and having an input impedance looking into the core circuit from the first pin and the second pin; and a charging control circuit, coupled to the core circuit, arranged for selectively providing a voltage source to one of the first pin and the second pin; wherein the input impedance of the core circuit is configured to make the voltage source substantially intact when the voltage source is coupled to one of the first pin and the second pin.

First claim

What is claimed is:

1. A charging control circuit of universal serial bus (USB) device, wherein the USB device is coupled to an external charger and a battery device, the USB device comprises a core circuit having a first pin and a second pin, and the charging control circuit comprises:
a voltage source, arranged for selectively coupling to one of the first pin and the second pin according to a switch control signal;
wherein input impedance looking into the core circuit from the first pin and the second pin is configured to make the voltage source substantially intact when the voltage source is coupled to at least one of the first pin and the second pin;
wherein when the external charger provides a first supply voltage to charge the battery device to make the battery device generate a battery output voltage, the charging control circuit is arranged to be powered up by the first supply voltage, and the switch control signal is generated in response to a second supply voltage derived from the battery output voltage.

2. The charging control circuit of claim 1 , wherein when the USB device is under a dead battery condition, the second supply voltage is used to power up the core circuit.

3. The charging control circuit of claim 1 , wherein the switch control signal is generated from the core circuit.

4. The charging control circuit of claim 1 , further comprising:
a current source, arranged for selectively coupling to one of the first pin and the second pin according to the switch control signal.

5. The charging control circuit of claim 1 , further comprising:
a charger controller, arranged for generating a control signal;
a charger detector, arranged for providing the voltage source; and
a switch circuit, coupled to the first pin and the second pin in parallel, the switch circuit arranged for selectively coupling the voltage source to one of the first pin and the second pin according to the switch control signal.

6. The charging control circuit of claim 5 , wherein the control signal is generated in response to the first supply voltage.

7. A charging control circuit of universal serial bus (USB) device, wherein the USB device is coupled to an external charger and a battery device, the USB device comprises a core circuit having a first pin and a second pin, and the charging control circuit comprises:
a current source, arranged for selectively coupling to one of the first pin and the second pin according to a switch control signal;
wherein input impedance looking into the core circuit from the first pin and the second pin is configured to make the current source substantially intact when the current source is coupled to at least one of the first pin and the second pin;
wherein when the external charger provides a first supply voltage to charge the battery device to make the battery device generate a battery output voltage, the charging control circuit is arranged to be powered up by the first supply voltage, and the switch control signal is generated in response to a second supply voltage derived from the battery output voltage.

8. The charging control circuit of claim 7 , wherein when the USB device is under a dead battery condition, the second supply voltage is used to power up the core circuit.

9. The charging control circuit of claim 7 , wherein the switch control signal is generated from the core circuit.

10. A core circuit of universal serial bus (USB) device, wherein the USB device is coupled to an external charger and a battery device, and the core circuit comprises:
a first pin and a second pin coupled to the external charger;
wherein input impedance looking into the core circuit from the first pin and the second pin is configured to make a voltage source substantially intact when the voltage source is coupled to at least one of the first pin and the second pin;
wherein when the external charger provides a first supply voltage to charge the battery device to make the battery device generate a battery output voltage, the core circuit is arranged to be powered up by a second supply voltage derived from the battery output voltage generated by the battery device, rather than derived from the first supply voltage, and the core circuit generates a switch control signal in response to the second supply voltage to control the voltage source to selectively couple to one of the first pin and the second pin.

11. The core circuit of claim 10 , wherein the core circuit generates the switch control signal to further control a current source to selectively couple to one of the first pin and the second pin.

12. The core circuit of claim 10 , further comprising:
a first P-type transistor, having an output node coupled to the first pin; and
a second P-type transistor, having an output node coupled to the second pin;
wherein a control node of the first P-type transistor and a control node of the second P-type transistor are tied to the second supply voltage.

13. The core circuit of claim 10 , further comprising:
a control circuit, arranged for receiving a core voltage and generating the switch control signal; and
a physical layer circuit, having the first pin and the second pin, the physical layer circuit arranged for being configured by the switch control signal and powered by the core voltage.

Assignees

• Mediatek Inc

Inventors

• Hong Hao-Ping
• Chen Shang-Pin
• Shen Ding-Shiuan

Classifications

• H02J7/963

  in response to battery voltage gradient · CPC title

• H02J7/865

  Battery or charger load switching, e.g. concurrent charging and load supply (H02J7/50 takes precedence) · CPC title

• H02J7/751

  concerning the insertion or the connection of the batteries · CPC title

• H02J7/00 Primary

  Circuit arrangements for charging or discharging batteries or for supplying loads from batteries · CPC title

• G06F13/385

  for adaptation of a particular data processing system to different peripheral devices · CPC title