Photovoltaic module having printed PV cells connected in series by printed conductors

Patent metadata

Field	Value
Publication number	US-9525097-B2
Application number	US-201414214559-A
Country	US
Kind code	B2
Filing date	Mar 14, 2014
Priority date	Mar 15, 2013
Publication date	Dec 20, 2016
Grant date	Dec 20, 2016

Abstract

A PV module is formed having an array of PV cells, where the cells are separated by gaps. Each cell contains an array of small silicon sphere diodes (10-300 microns in diameter) connected in parallel. The diodes and conductor layers may be patterned by printing. A continuous metal substrate supports the diodes and conductor layers in all the cells. A dielectric substrate is laminated to the metal substrate. Trenches are then formed by laser ablation around the cells to sever the metal substrate to form electrically isolated PV cells. A metallization step is then performed to connect the cells in series to increase the voltage output of the PV module. An electrically isolated bypass diode for each cell is also formed by the trenching step. The metallization step connects the bypass diode and its associated cell in a reverse-parallel relationship.

First claim

What is claimed is:

1. A process for forming a solar cell structure comprising:
depositing a first conductor layer on a metal substrate;
providing a plurality of diode spheres on the first conductor layer as a first diode layer, the diode spheres having a top surface portion of a first conductivity type, for being exposed to the sun to generate electricity, and having a bottom surface portion of a second conductivity type electrically contacting the first conductor layer;
depositing a second conductor layer electrically contacting the top surface portion,
wherein at least the diode layer and the second conductor layer are patterned to form an array of cells, wherein there is a gap between adjacent cells;
providing a dielectric substrate affixed to a bottom surface of the metal substrate;
laser ablating first trenches through at least the metal substrate to form a plurality of electrically isolated cells; and
interconnecting at least some of the cells in series by electrically connecting the first conductor layer of one cell to the second conductor layer of an adjacent cell.

2. The process of claim 1 further comprising forming a bypass diode associated with each cell by forming second trenches through at least the metal substrate within each cell and interconnecting the bypass diode and its associated cell in a reverse-parallel relationship.

3. The process of claim 1 wherein the step of providing the diode spheres comprises printing semiconductor spheres in an ink on the first conductor layer and then curing the ink.

4. The process of claim 1 wherein the step of laser ablating comprises forming the first trenches only through the metal substrate down to the dielectric substrate.

5. The process of claim 1 wherein the first conductor layer is patterned when deposited to correspond to the array of cells.

6. The process of claim 1 wherein an edge of the metal substrate extends out from each of the cells after the step of laser ablating to gain electrical access to the bottom surface portion of the diodes.

7. The process of claim 1 wherein the second conductor layer comprises a transparent conductor material.

8. The process of claim 1 wherein the step of interconnecting comprises printing a patterned metal layer to interconnect the cells in series.

9. The process of claim 1 where the step of providing the diode spheres comprises depositing semiconductor spheres on the first conductor layer and then doping the semiconductor spheres to create a pn junction in each of the semiconductor spheres to create the diode spheres.

10. The process of claim 1 wherein all steps are performed at atmospheric pressures.

11. The process of claim 1 wherein the process is a roll-to-roll process.

12. The process of claim 1 wherein the diode spheres comprise microscopic silicon spheres.

13. The process of claim 1 wherein the cells are connected in series in a serpentine pattern.

14. The process of claim 1 wherein the diode spheres comprise microscopic diode spheres, wherein each of the cells comprises a subset of the plurality of diode spheres connected in parallel.

Assignees

• Nthdegree Tech Worldwide Inc

Inventors

• Youngbull Tricia
• Oraw Bradley Steven
• Ray William Johnstone

Classifications

• H01L31/0463

  Electricity · mapped topic

• H01L31/0465

  Electricity · mapped topic

• H01L31/035281

  Electricity · mapped topic

• H01L31/046

  Electricity · mapped topic

• H01L31/03529

  Electricity · mapped topic