Mask and method for manufacturing semiconductor device

Patent metadata

Field	Value
Publication number	US-9524880-B2
Application number	US-201514739876-A
Country	US
Kind code	B2
Filing date	Jun 15, 2015
Priority date	Jul 18, 2014
Publication date	Dec 20, 2016
Grant date	Dec 20, 2016

Abstract

A mask may be used in a process for manufacturing a semiconductor device. The semiconductor device may include a source line, a first drain contact terminal, and a second drain contact terminal. The mask may include the following elements: a source-line corresponding light-transmitting portion, which corresponds to the source line; a first-drain-contact-terminal corresponding light-transmitting portion, which corresponds to the first drain contact terminal; a second-drain-contact-terminal corresponding light-transmitting portion, which corresponds to the second drain contact terminal; and a first light-blocking portion, which abuts at least one of the source-line corresponding light-transmitting portion, the first-drain-contact-terminal corresponding light-transmitting portion, and the second-drain-contact-terminal corresponding light-transmitting portion.

First claim

What is claimed is:

1. A mask for use in manufacturing of a semiconductor device, the semiconductor device comprising a source line, a first drain contact terminal, and a second drain contact terminal, the mask comprising:
a source-line corresponding light-transmitting portion, which corresponds to the source line;
a first-drain-contact-terminal corresponding light-transmitting portion, which corresponds to the first drain contact terminal;
a second-drain-contact-terminal corresponding light-transmitting portion, which corresponds to the second drain contact terminal and is smaller than the source-line corresponding light-transmitting portion; and
a first light-blocking portion, which abuts at least one of the source-line corresponding light-transmitting portion, the first-drain-contact-terminal corresponding light-transmitting portion, and the second-drain-contact-terminal corresponding light-transmitting portion.

2. The mask of claim 1 , wherein the first light-blocking portion is positioned between the first-drain-contact-terminal corresponding light-transmitting portion and the second-drain-contact-terminal corresponding light-transmitting portion in a direction parallel to a longitudinal direction of the source-line corresponding light-transmitting portion in a plan view of the mask.

3. The mask of claim 1 , wherein the source-line corresponding light-transmitting portion is positioned between the first-drain-contact-terminal corresponding light-transmitting portion and the second-drain-contact-terminal corresponding light-transmitting portion in a plan view of the mask.

4. The mask of claim 1 , wherein a longitudinal direction of the first-drain-contact-terminal corresponding light-transmitting portion is perpendicular to a longitudinal direction of the source-line corresponding light-transmitting portion in a plan view of the mask.

5. The mask of claim 1 , wherein the first-drain-contact-terminal corresponding light-transmitting portion and the second-drain-contact-terminal corresponding light-transmitting portion are symmetrical to each other with reference to the source-line corresponding light-transmitting portion in a plan view of the mask.

6. The mask of claim 1 , further comprising: a second light-blocking portion, which abuts at least one of the source-line corresponding light-transmitting portion, the first-drain-contact-terminal corresponding light-transmitting portion, and the second-drain-contact-terminal corresponding light-transmitting portion, wherein a size of the second light-blocking portion is unequal to a size of the first light-blocking portion.

7. A method for manufacturing semiconductor device, the method comprising:
forming a transistor that comprises a gate electrode, a source electrode, and a drain electrode;
forming a dielectric layer on the transistor, wherein a first portion of the dielectric layer overlaps the source electrode, and wherein a second portion of the dielectric layer overlaps the drain electrode;
using a mask for removing the first portion of the dielectric layer to form a first space when using the mask for removing the second portion of the dielectric layer to form a second space, wherein the mask comprises a source-line corresponding light-transmitting portion and a first-drain-contact-terminal corresponding light-transmitting portion, wherein the source-line corresponding light-transmitting portion corresponds to the source line, wherein the first-drain-contact-terminal corresponding light-transmitting portion corresponds to the first drain contact terminal and is smaller than the source-line corresponding light-transmitting portion; and
providing a first conductive material set in the first space for forming a source line when providing a second conductive material set in the second space for forming a first drain contact terminal.

8. The method of claim 7 , wherein the mask comprises
a first light-blocking portion, which abuts at least one of the source-line corresponding light-transmitting portion and the first-drain-contact-terminal corresponding light-transmitting portion.

9. The method of claim 8 ,
wherein the semiconductor device further comprises a second drain contact terminal, and
wherein the mask further comprises a second-drain-contact-terminal corresponding light-transmitting portion, which corresponds to the second drain contact terminal.

10. The method of claim 9 , wherein the first light-blocking portion is positioned between the first-drain-contact-terminal corresponding light-transmitting portion and the second-drain-contact-terminal corresponding light-transmitting portion in a direction parallel to a longitudinal direction of the source-line corresponding light-transmitting portion in a plan view of the mask.

11. The method of claim 9 , wherein the source-line corresponding light-transmitting portion is positioned between the first-drain-contact-terminal corresponding light-transmitting portion and the second-drain-contact-terminal corresponding light-transmitting portion in a plan view of the mask.

12. The method of claim 9 , wherein a longitudinal direction of the first-drain-contact-terminal corresponding light-transmitting portion is perpendicular to a longitudinal direction of the source-line corresponding light-transmitting portion in a plan view of the mask.

13. The method of claim 9 , wherein the first-drain-contact-terminal corresponding light-transmitting portion and the second-drain-contact-terminal corresponding light-transmitting portion are symmetrical to each other with reference to the source-line corresponding light-transmitting portion in a plan view of the mask.

14. The method of claim 9 ,
wherein the mask further comprises a second light-blocking portion, which abuts at least one of the source-line corresponding light-transmitting portion, the first-drain-contact-terminal corresponding light-transmitting portion, and the second-drain-contact-terminal corresponding light-transmitting portion, and
wherein a size of the second light-blocking portion is unequal to a size of the first light-blocking portion.

15. The method of claim 8 , further comprising: positioning the mask such that the source-line corresponding light-transmitting portion overlaps the source electrode and such that the first-drain-contact-terminal corresponding light-transmitting portion overlaps the drain electrode.

16. The method of claim 7 , further comprising:
forming a first metal silicide member on the source electrode; and
forming a second metal silicide member on the drain electrode,
wherein the first conductive material set overlaps the first metal silicide member, and
wherein the second conductive material set overlaps the second metal silicide member.

17. The method of claim 7 , wherein the dielectric layer comprises an interlayer dielectric layer and an etch stop layer, and wherein both of the source line and the first drain contact terminal are formed after at least one of the interlayer dielectric layer and the etch stop layer has been removed.

18. The method of claim 7 , wherein the first conductive material set is a first portion of a metal material layer, and wherein the second conductive material set is a second portion of the metal material layer.

19. The method of claim 17 , wherein the metal material layer is formed of at least one of tungsten, cobalt, and titanium.

20. The method of claim 7 , further comprising: reducing a height of the first conductive material set to be below a height of the gate electrode; and reducing a hei

Assignees

• Semiconductor Mfg Int Shanghai Corp

Inventors

• Li Shaobin
• Yang Yun
• Chiu Shengfin

Classifications

• H10P76/2041

  Photolithographic processes · CPC title

• H10P50/696

  Process specially adapted to improve the resolution of the mask · CPC title

• H10P50/283

  by chemical means · CPC title

• H10W20/089

  using processes for implementing desired shapes or dispositions of the openings, e.g. double patterning · CPC title

• H10W20/069 Primary

  by forming self-aligned vias or self-aligned contact plugs · CPC title