Core-modular interoperability architecture for modeling and simulation

Patent metadata

Field	Value
Publication number	US-9524358-B1
Application number	US-201313913929-A
Country	US
Kind code	B1
Filing date	Jun 10, 2013
Priority date	Jun 10, 2013
Publication date	Dec 20, 2016
Grant date	Dec 20, 2016

Abstract

Exemplary inventive practice provides initially for designation of all tasks contemplated for performance in the context of an interoperability architecture for computer modeling/simulation. Task requirements afford the bases for determining the models to be incorporated and the functionalities to be carried out in the architecture. The major architectural elements are the core, the interface, and the modules. The core is compartmentalized. Each module constitutes an individual model. Each functionality is allocated to either the core or at least one module, with the guiding principle that a functionality that characterizes the modules in general should be situated in the core, in at least one category. The interface provides for plug-and-play functionality of the modules. The architecture operates in an iterative three-phase cycle: modules write data to the core; the core processes data; modules read updated core data. The invention reduces model development, increases code reuse, and promotes interoperability of diverse models.

First claim

What is claimed is:

1. A method for designing and executing an interoperability architecture for computer modeling, the method comprising:
establishing tasks;
formulating use cases corresponding to said tasks;
based on said use cases, identifying requirements;
based on said requirements, constructing an interoperability architecture characterized by both physical interoperability and functional interoperability, said interoperability architecture having a core, plural modules, and an interface between said core and said modules, each said module representing a different computer model, wherein said constructing of said interoperability architecture includes determining said modules, determining plural functionalities, and assigning each said functionality to either said core or each of at least one said module, wherein:
said core contains a fixed set of shared data;
said core includes at least four core components;
a first said core component is a geometry component;
a second said core component is a communications component;
a third said core component is a sensor fusion component;
a fourth said core component is a decision-making component;
said fixed set of said shared data is categorized according to said geometry component, said communications component, said sensor fusion component, and said decision-making component; and
effecting interoperability of said modules with respect to each other, said effecting of said interoperability including implementing a computer, wherein said interoperability includes a cyclical process having at least three phases, said at least three phases including an initiation phase, a simulation phase, and an interrogation phase, said cyclical process maintaining consistency of said shared data contained in said core, wherein:
during said initiation phase, said modules have write-access, via said interface, to said shared data contained in said core, each said module being capable of adding to or deleting from or modifying said shared data contained in said core, said modules not having read-access to said shared data contained in said core;
during said simulation phase, said core performs at least one calculation with respect to said shared data, said modules having neither write-access nor read-access to said shared data contained in said core;
during said interrogation phase, said modules have read-access, via said interface, to said shared data contained in said core, each said module being capable of reading said shared data contained in said core, said modules not having write-access to said shared data contained in said core.

2. The method of claim 1 , wherein:
said assigning of each said functionality includes deciding whether said functionality belongs in said core or at least one said module;
said deciding of whether said functionality belongs in said core or at least one said module includes considering whether every said module needs to use said functionality;
if every said module needs to use said functionality, then said functionality belongs in said core;
if at least one said module does not need to use said functionality, then said functionality belongs in each said module that does need to use said functionality.

3. The method of claim 1 wherein, if a said functionality is assigned to said core, then said constructing of said interoperability architecture includes designating said functionality for at least one said core component.

4. The method of claim 3 , wherein:
said assigning of each said functionality includes deciding whether said functionality belongs in said core or at least one said module;
said deciding of whether said functionality belongs in said core or at least one said module includes considering whether every said module needs to use said functionality;
if every said module needs to use said functionality, then said functionality belongs in said core;
if at least one said module does not need to use said functionality, then said functionality belongs in each said module that does need to use said functionality.

5. An apparatus comprising a computer having computer code characterized by computer program logic for enabling said computer to effectuate an interoperability architecture for computer modeling, said computer code being executable by said computer so that, in accordance with said computer program logic, said computer performs acts including:
inputting data that defines functionalities of said architecture;
configuring said architecture characterized by both physical interoperability and functional interoperability, said interoperability architecture having a core, a plurality of modules, and an interface between said core and said modules, each said module representing a different computer modeling program, wherein:
said core contains a fixed set of shared data;
said core includes at least four core components;
a first said core component is a geometry component;
a second said core component is a communications component;
a third said core component is a sensor fusion component;
a fourth said core component is a decision-making component;
said fixed set of said shared data is categorized according to said geometry component, said communications component, said sensor fusion component, and said decision-making component;
assigning each said functionality to either said core or at least one said module, wherein said functionality is assigned to said core if every said module needs to use said functionality, and wherein said functionality is assigned to at least one said module if at least one said module does not need to use said functionality; and
maintaining interoperability of said architecture through an iterative cyclical process having at least three phases, said at least three phases including an initiation phase, a simulation phase, and an interrogation phase, said cyclical process maintaining consistency of said shared data contained in said core, wherein:
during said initiation phase, said modules have write-access, via said interface, to said shared data contained in said core, each said module being capable of adding to or deleting from or modifying said shared data contained in said core, said modules not having read-access to said shared data contained in said core;
during said simulation phase, said core performs at least one calculation with respect to said shared data, said modules having neither write-access nor read-access to said shared data contained in said core;
during said interrogation phase, said modules have read-access, via said interface, to said shared data contained in said core, each said module being capable of reading said shared data contained in said core, said modules not having write-access to said shared data contained in said core.

6. The apparatus of claim 5 , wherein said functionalities derive from requirements that derive from use cases that derive from tasks, and wherein said computer performs operations further including inputting data that defines at least one of said requirements, said use cases, and said tasks.

7. The apparatus of claim 5 , wherein said assigning of a said functionality to a core includes assigning said functionality to at least one said core component.

8. The apparatus of claim 7 , wherein:
said functionalities derive from requirements that derive from use cases that derive from tasks;
said computer performs operations further including inputting data that defines at least one of said requirements, said use cases, and said tasks.

9. A non-transitory computer-readable storage medium comprising computer-executable computer code characterized by computer program logic for enabling a computer to effectuate an interoperability architecture for computer mode

Assignees

• Rutkowski Krzysztof J
• Farley Stephen M
• Us Navy

Inventors

• Rutkowski Krzysztof J
• Farley Stephen M

Classifications

• G06F11/00

  Error detection; Error correction; Monitoring (error detection, correction or monitoring in information storage based on relative movement between record carrier and transducer G11B20/18; monitoring, i.e. supervising the progress of recording or reproducing G11B27/36; in static stores G11C29/00) · CPC title

• G06F8/35

  model driven · CPC title

• G06F8/10

  Requirements analysis; Specification techniques · CPC title

• G06F30/20 Primary

  Design optimisation, verification or simulation (optimisation, verification or simulation of circuit designs G06F30/30) · CPC title

• G09B9/003 Primary

  for military purposes and tactics · CPC title