Display panel

US9522513B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9522513-B2
Application numberUS-201514666191-A
CountryUS
Kind codeB2
Filing dateMar 23, 2015
Priority dateApr 29, 2014
Publication dateDec 20, 2016
Grant dateDec 20, 2016

How to read this patent

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A display panel is provided. The display panel comprises a first substrate, a second substrate and a sealant. The first substrate has a display area. The second substrate is opposite to the first substrate. The sealant is disposed between the first substrate and the second substrate, and surrounds and encloses the display area. The sealant comprises a plurality of node portions and a plurality of strip portions. The maximum width of the node portion is larger than the width of the strip portion. The node portions include a first node portion. The first node portion and two strip portions adjacent thereto form a first angle facing the display area. The first angle is larger than 90 degree.

First claim

Opening claim text (preview).

What is claimed is: 1. A display panel, comprising: a first substrate having a display area, and a border area adjacent to the display area, surrounding an edge of the display area and extending to an edge of the first substrate; a second substrate opposite to the first substrate; a sealant disposed between the first substrate and the second substrate, wherein the sealant surrounds and encloses the display area, the sealant comprises a plurality of node portions and a plurality of strip portions, a maximum width of each node portion is larger than a width of each strip portion, and each node portion is interposed at a junction between two adjacent strip portions; a flat layer disposed on the first substrate, wherein the flat layer disposed on the border area has an opening exposing the first substrate, and the sealant is disposed in the opening; and a transparent electrode layer disposed on the flat layer, wherein the opening has an inner edge adjacent to the transparent electrode layer, and a distance from the inner edge to an edge of the transparent electrode layer is between 10 μm and 100 μm; wherein the node portions include a first node portion, the first node portion and two strip portions adjacent thereto form a first angle facing the display area, and the first angle is larger than 90 degrees. 2. The display panel according to claim 1 , wherein the node portions include a second node portion, the second node portion and two strip portions adjacent thereto form a second angle facing the display area, and the second angle is smaller than the first angle. 3. The display panel according to claim 2 , wherein a maximum width of the first node portion which is at a vertex of the first angle is smaller than a maximum width of the second node portion which is at a vertex of the second angle. 4. The display panel according to claim 1 , wherein the display area has a geometric center, and a distance from the geometric center to each node portion is larger than a vertical distance from the geometric center to the strip portions adjacent to the node portion. 5. The display panel according to claim 1 , wherein each strip portion is a straight line segment. 6. The display panel according to claim 1 , wherein a width of the sealant is larger than a width of the opening. 7. The display panel according to claim 1 , wherein in the border area, a height of part of the flat layer adjacent to the display area is larger than a height of part of the flat layer adjacent to the edge of the first substrate. 8. The display panel according to claim 1 , wherein the opening has an outer edge away from the transparent electrode layer, and a distance from the inner edge to the outer edge is between 150 μm and 400 μm. 9. The display panel according to claim 1 , wherein the opening has an outer edge away from the transparent electrode layer, and the sealant covers part of the flat layer that is adjacent to the outer edge. 10. A display panel, comprising: a first substrate having a display area; a second substrate opposite to the first substrate; and a sealant disposed between the first substrate and the second substrate, wherein the sealant surrounds and encloses the display area, the sealant comprises a plurality of node portions and a plurality of strip portions, a maximum width of each node portion is larger than a width of each strip portion, and each node portion is interposed at a junction between two adjacent strip portions; wherein the node portions include a first node portion, the first node portion and two strip portions adjacent thereto form a first angle facing the display area, and the first angle is larger than 90 degrees; wherein the display area has a concave arc edge concaving toward a geometric center of the display area, the node portions include a third node portion corresponding to the concave arc edge, the third node portion and two strip portions adjacent thereto form a third angle facing the display area, and the third angle is larger than 180 degrees. 11. The display panel according to claim 10 , wherein the display area has, an acute angle, the sealant corresponding to the acute angle shape has a plurality of sub-node portions, and a maximum width of each sub-node portion is larger than the maximum width of the node portion. 12. A display panel, comprising: a first substrate having a display area and a border area adjacent to the display area, surrounding an edge of the display area and extending to an edge of the first substrate; a second substrate opposite to the first substrate; a flat layer disposed on the first substrate, wherein the flat layer disposed on the border area has an opening exposing the first substrate, and the sealant is disposed in the opening; and a sealant disposed between the first substrate and the second substrate, wherein the sealant surrounds and encloses the display area, the sealant comprises a plurality of node portions and a plurality of strip portions, a maximum width of each node portion is larger than a width of each strip portion, and each node portion is interposed at a junction between two adjacent strip portions; wherein the node portions include a first node portion, the first node portion and two strip portions adjacent thereto form a first angle facing the display area, and the first angle is larger than 90 degrees; wherein in the border area, a height of part of the flat layer adjacent to the display area is larger than a height of part of the flat layer adjacent to the edge of the first substrate.

Assignees

Inventors

Classifications

  • Transparent · CPC title

  • B32B3/266Primary

    characterised by an apertured layer, the apertures going through the whole thickness of the layer, e.g. expanded metal, perforated layer, slit layer regular cells B32B3/12 · CPC title

  • applied in spaced arrangements, e.g. in stripes · CPC title

  • Insulating · CPC title

  • Displays, e.g. liquid crystal displays, plasma displays · CPC title

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What does patent US9522513B2 cover?
A display panel is provided. The display panel comprises a first substrate, a second substrate and a sealant. The first substrate has a display area. The second substrate is opposite to the first substrate. The sealant is disposed between the first substrate and the second substrate, and surrounds and encloses the display area. The sealant comprises a plurality of node portions and a plurality …
Who is the assignee on this patent?
Innolux Corp
What technology area does this patent fall under?
Primary CPC classification B32B3/266. Mapped technology areas include Operations & Transport.
When was this patent published?
Publication date Tue Dec 20 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).