Image sensor and method of processing image data with multiple differential ramping up/down signals, and image processing device including the image sensor

Patent metadata

Field	Value
Publication number	US-9521344-B2
Application number	US-201414338360-A
Country	US
Kind code	B2
Filing date	Jul 23, 2014
Priority date	Aug 8, 2013
Publication date	Dec 13, 2016
Grant date	Dec 13, 2016

Abstract

A method of operating an image sensor includes generating a plurality of ramping up/down signals, and comparing a correlated double sampled pixel signal produced from an output of a pixel with a correlated double sampled first ramping up/down signal among the plurality of ramping up/down signals in a reset interval. The method further includes comparing the correlated double sampled pixel signal with the correlated double sampled first ramping up/down signal at one sampling time or more in an image interval, and a step of outputting a selected ramping up/down signal among the plurality of ramping up/down signals based on a result of the comparison.

First claim

What is claimed is:

1. A method of operating an image sensor comprising a plurality of pixels, the method comprising:
generating a plurality of ramping up/down signals;
first comparing a correlated double sampled pixel signal produced from an output of a pixel with a correlated double sampled first ramping up/down signal among the plurality of ramping up/down signals in a reset interval;
second comparing the correlated double sampled pixel signal with the correlated double sampled first ramping up/down signal at one or more sampling times after the reset interval and before an image interval; and
selecting and outputting a selected ramping up/down signal among the plurality of ramping up/down signals in the image interval based on a result of the second comparing.

2. The method of claim 1 , wherein the selected ramping up/down signal is a second ramping up/down signal which is different from the first ramping up/down signal.

3. The method of claim 1 , wherein the selected ramping up/down signal is the first ramping up/down signal.

4. The method of claim 1 , wherein at least two signals among the plurality of ramping up/down signals are differential signals.

5. The method of claim 4 , wherein each pair of differential ramping up/down signals among the plurality of ramping up/down signals is generated by a different signal generator.

6. A device comprising an image sensor, wherein the image sensor comprises:
a pixel configured to generate a pixel signal; and
a signal processing circuit configured to perform a first correlated double sampling (CDS) operation on the pixel signal by using a first ramping up/down signal among a plurality of ramping up/down signals in a reset interval, and to perform a second CDS operation on the pixel signal by using a selected ramping up/down signal among the plurality of ramping up/down signals in an image interval,
wherein the signal processing circuit includes:
a signal generator configured to generate the plurality of ramping up/down signals;
a selection circuit configured to output the selected ramping up/down signal in response to at least one control signal; and
a comparison circuit configured to perform a correlated double sampling of the pixel signal, to perform a correlated double sampling of the first ramping up/down signal, to compare the correlated double sampled pixel signal with the correlated double sampled first ramping up/down signal at one or more sampling times between the reset interval and the image interval, and to generate the at least one control signal according to a result of the comparison.

7. The device of claim 6 , wherein the selected ramping up/down signal is a second ramping up/down signal which is different from the first ramping up/down signal.

8. The device of claim 6 , wherein the selected ramping up/down signal is the first ramping up/down signal.

9. The device of claim 6 , wherein the signal generator includes a plurality of ramping up/down signal generators each generating a pair of corresponding differential ramping up/down signals among the plurality of ramping up/down signals.

10. The device of claim 6 , further comprising an image signal processor processing an output signal of the image sensor.

11. A signal processing device for processing a pixel signal produced by a pixel of an image sensor, the signal processing device comprising:
a signal generator configured to generate a plurality of ramping up/down signals;
a selection circuit configured to receive the plurality of ramping up/down signals and to output a selected ramping up/down signal among the plurality of ramping up/down signals in response to at least one control signal; and
a correlated double sampling circuit configured to perform a correlated double sampling operation on the pixel signal and the selected ramping up/down signal, and to output a correlated double sampled output signal having a first level when a correlated double sampled pixel signal is greater than a correlated double sampled selected ramping up/down signal, and to output the correlated double sampled output signal having a second level when the correlated double sampled pixel signal is less than the correlated double sampled selected ramping up/down signal,
wherein the correlated double sampling circuit is configured to perform the correlated double sampling operation on the pixel signal and the selected ramping up/down signal, and to output the correlated double sampled output signal, at least once between a reset interval of the pixel and an image interval of the pixel,
wherein the correlated double sampling circuit is further configured to perform the correlated double sampling operation of the pixel signal and the selected ramping up/down signal at least once during the image interval of the sensor, and
wherein the correlated double sampled output signal which is output by the correlated double sampling circuit between the reset interval of the pixel and the image interval of the pixel generates the at least one control signal for the selection circuit while the correlated double sampling circuit performs the correlated double sampling operation on the pixel signal and the selected ramping up/down signal during the image interval of the pixel.

12. The signal processing device of claim 11 , further comprising:
a comparator connected to receive the correlated double sampled output signal from the correlated double sampling circuit and to receive a reference voltage, and which is configured to compare the correlated double sampled output signal to the reference voltage and to output a comparison signal in response to the comparison; and
a memory device configured to receive and latch the comparison signal, and to output the comparison signal as the at least one control signal.

13. The signal processing device of claim 12 , further comprising a counter connected to receive the comparison signal and to count a time period between a start of the image interval and a transition of the comparison signal from a first level to a second level as a result of the comparison.

14. The signal processing device of claim 11 , wherein the correlated double sampling circuit is configured to perform the correlated double sampling of the pixel signal and the selected ramping up/down signal, and to output the correlated double sampled output signal, at least twice between the reset interval of the pixel and the image interval of the pixel.

15. The signal processing device of claim 11 , wherein at least one of the ramping up/down signals comprises a signal which has a ramp-up portion and a ramp-down portion during the image interval.

Assignees

• Lee Jung Ho
• Kim Jin Woo
• Park Beom Soo
• Yun Jae Cheol
• Samsung Electronics Co Ltd

Inventors

• Lee Jung Ho
• Kim Jin Woo
• Park Beom Soo
• Yun Jae Cheol

Classifications

• H04N25/616 Primary

  involving a correlated sampling function, e.g. correlated double sampling [CDS] or triple sampling · CPC title

• H03M1/56 Primary

  Input signal compared with linear ramp · CPC title

• H03M1/0685

  using real and complementary patterns · CPC title

• H04N25/78

  Readout circuits for addressed sensors, e.g. output amplifiers or A/D converters · CPC title

• H04N5/378 Primary

  Electricity · mapped topic