Method for forming semiconductor nanowire transistors

Patent metadata

Field	Value
Publication number	US-9520484-B2
Application number	US-201514921919-A
Country	US
Kind code	B2
Filing date	Oct 23, 2015
Priority date	Oct 24, 2014
Publication date	Dec 13, 2016
Grant date	Dec 13, 2016

Abstract

A method for forming a semiconductor device includes forming a semiconductor substrate having at least one fin structure on an insulator on a substrate. The fin structure includes a semiconductor layer overlying a sacrificial layer. The method also includes forming a patterned dummy gate on the substrate, forming a first spacer on both sides of the dummy gate, and using the dummy gate and the first spacer as a mask to remove a portion of the semiconductor layer and the sacrificial layer. Then the sacrificial layer is etched to form recessed regions on both sides of the sacrificial layer, and a second spacer is formed to cover both sides of the sacrificial layer and expose both sides of the semiconductor layer. The method also includes performing epitaxial growth on both sides of the semiconductor layer to form source and drain regions.

First claim

What is claimed is:

1. A method of forming a semiconductor nanowire device, the method comprising:
forming a semiconductor substrate having at least one fin structure on an insulator on a substrate, said fin structure including a semiconductor layer overlying a sacrificial layer;
forming a patterned dummy gate on the substrate;
forming a first spacer on both sides of the dummy gate;
using the dummy gate and the first spacer as a mask, removing a portion of the semiconductor…

Assignees

• Semiconductor Mfg Int Shanghai Corp

Inventors

• Hong Zhongshan

Classifications

• H10P50/667

  Electricity · mapped topic

• H10P50/642

  Electricity · mapped topic

• H10P50/242

  Electricity · mapped topic

• H10P50/71

  Electricity · mapped topic

• H10D62/8325

  Electricity · mapped topic