MIM capacitors with diffusion-blocking electrode structures and semiconductor devices including the same

Patent metadata

Field	Value
Publication number	US-9520460-B2
Application number	US-201414340923-A
Country	US
Kind code	B2
Filing date	Jul 25, 2014
Priority date	Sep 5, 2013
Publication date	Dec 13, 2016
Grant date	Dec 13, 2016

Abstract

A semiconductor device includes a MIM capacitor on a substrate. The MIM capacitor includes a dielectric region and first and second electrodes on opposite sides of the dielectric region. At least one of the first and second electrodes, e.g., an upper electrode, includes an oxygen diffusion blocking material, e.g., oxygen atoms, at a concentration that decreases in a direction away from the dielectric region. The at least one of the first and second electrodes may include a first layer having a first concentration of the oxygen diffusion blocking material and a second layer on the first layer and having a second concentration of the oxygen diffusion blocking material less than the first concentration. The at least one of the first and second electrodes may further include a third layer on the second layer and having a concentration of the oxygen diffusion blocking material less than the second concentration.

First claim

What is claimed is:

1. A metal-insulator-metal (MIM) capacitor comprising:
a storage node contact passing through an interlayer insulating film;
a lower electrode on and electrically connected to the storage node contact;
a dielectric film on the lower electrode; and
an upper electrode on the dielectric film and comprising a first metal nitride electrode including a first material at a first concentration, a second metal nitride electrode on the first electrode and including the first material at a second concentration, and a third metal nitride electrode on the second electrode and having a third concentration of the first material, wherein the first, second and third concentrations are different from one another and wherein the second concentration is lower than the first concentration and higher than the third concentration.

2. The MIM capacitor of claim 1 , wherein the first, second, and third metal nitride electrodes comprise respective first, second and third metal nitride layers stacked on the dielectric film, wherein the second metal nitride layer is disposed directly on the first metal nitride layer, and wherein the third metal nitride layer is disposed directly on the second metal nitride layer.

3. The MIM capacitor of claim 2 , wherein the first metal nitride electrode is thinner than each of the second and third metal nitride electrodes.

4. The MIM capacitor of claim 3 , wherein the first metal nitride electrode has a thickness of about 1 Å to about 50 Å.

5. The MIM capacitor of claim 2 , wherein the third metal nitride electrode is thicker than each of the first and second electrodes.

6. The MIM capacitor of claim 1 , wherein the third metal nitride electrode is substantially free of the first material.

7. The MIM capacitor of claim 1 , wherein the second concentration decreases as from a bottom to a top of the second electrode.

8. The MIM capacitor of claim 1 , wherein the first material comprises oxygen atoms.

9. The MIM capacitor of claim 1 , further comprising a protective film disposed between the dielectric film and the upper electrode.

Assignees

• Samsung Electronics Co Ltd

Inventors

• Lee Hyun-Suk
• Kim Tae-Kyun
• Lee Jin-Su
• Park Dong-Kyun
• Lee Jong-Myeong

Classifications

• H10B12/03

  Making the capacitor or connections thereto · CPC title

• H10D1/716

  having vertical extensions · CPC title

• H10D1/696 Primary

  comprising multiple layers, e.g. comprising a barrier layer and a metal layer (barrier layers to prevent diffusion of hydrogen or oxygen in perovskite based capacitors H10D1/688) · CPC title

• H01L27/1085

  Electricity · mapped topic

• H01L28/75 Primary

  Electricity · mapped topic