Display device and electronic device including the same

Patent metadata

Field	Value
Publication number	US-9520411-B2
Application number	US-94547510-A
Country	US
Kind code	B2
Filing date	Nov 12, 2010
Priority date	Nov 13, 2009
Publication date	Dec 13, 2016
Grant date	Dec 13, 2016

Abstract

A display device includes a pixel portion including a plurality of pixels each including a first transistor, a second transistor, and a light-emitting element, in which a gate of the first transistor is electrically connected to a scan line, one of a source and a drain of the first transistor is electrically connected to a signal line, and the other of them is electrically connected to a gate of the second transistor; one of a source and a drain of the second transistor is electrically connected to a power supply line and the other of them is electrically connected to the light-emitting element, and the first transistor includes an oxide semiconductor layer. A period when the display device displays a still image includes a period in which output of a signal to all the scan lines in the pixel portion is stopped.

First claim

The invention claimed is:

1. A display device comprising:
a pixel portion comprising a plurality of pixels each including a first transistor, a second transistor, and a light-emitting element having a pair of electrodes,
a driver circuit portion for driving the pixel portion;
a signal generation circuit for generating a control signal for driving the driver circuit portion and an image signal supplied to the plurality of pixels;
a memory circuit for storing image signals of respective frame periods;
a comparison circuit for detecting a difference between image signals of successive frame periods among the image signals of the respective frame periods stored in the memory circuit by selectively reading out the image signals of successive frame periods stored in the memory circuit and comparing the image signals;
a selection circuit for selecting and outputting the image signals of the successive frame periods when the comparison circuit detects the difference; and
a display control circuit for supplying the control signal and the image signal output from the selection circuit to the driver circuit portion when the comparison circuit detects the difference, and stopping supply of the control signal to the driver circuit portion when the comparison circuit does not detect the difference,
wherein a first gate of the first transistor is electrically connected to a scan line, one of a first source and a first drain of the first transistor is electrically connected to a signal line, and the other of the first source and the first drain of the first transistor is electrically connected to a second gate of the second transistor,
wherein one of a second source and a second drain of the second transistor is electrically connected to a power supply line and the other of the second source and the second drain of the second transistor is electrically connected to one of the pair of electrodes of the light-emitting element,
wherein the first transistor comprises a first oxide semiconductor layer a hydrogen concentration of which is 5×10 19 /cm 3 or less,
wherein a node between the second gate and the other of the first source and the first drain is configured to be supplied with a video signal that is an analog signal,
wherein the node is configured to hold the video signal when the first transistor is off,
wherein a period when the display device displays a still image includes a period when output of a signal to all the scan line in the pixel portion is stopped,
wherein a carrier concentration of the first oxide semiconductor layer is less than 1×10 14 /cm 3 ,
wherein the first oxide semiconductor layer comprises indium, gallium, and zinc, and
wherein the first oxide semiconductor layer comprises a microcrystalline portion.

2. The display device according to claim 1 , wherein the control signal is a high power supply potential, a low power supply potential, a clock signal, a start pulse signal, or a reset signal.

3. The display device according to claim 1 , wherein the plurality of pixels each further comprises a luminous layer.

4. The display device according to claim 1 , wherein a band gap of the first oxide semiconductor layer is 2 eV or more.

5. The display device according to claim 1 , wherein the second transistor comprises a second oxide semiconductor layer a hydrogen concentration of which is 5×10 19 /cm 3 or less.

6. The display device according to claim 1 , wherein the second transistor comprises a polycrystalline silicon layer.

7. An electronic device comprising the display device according to claim 1 .

8. The electronic device according to claim 7 , wherein the electronic device is an electronic paper comprising operation keys.

9. A display device comprising:
a pixel portion comprising a plurality of pixels each including a first transistor, a second transistor, and a light-emitting element having a pair of electrodes;
a driver circuit portion for driving the pixel portion;
a signal generation circuit for generating a control signal for driving the driver circuit portion and an image signal to be supplied to the driver circuit portion;
a memory circuit for storing image signals of respective frame periods;
a comparison circuit for detecting and outputting a difference between image signals of successive frame periods among the image signals of the respective frame periods stored in the memory circuit by selectively reading out the image signals of successive frame periods stored in the memory circuit and comparing the image signals;
a selection circuit for outputting the image signals to be supplied to the driver circuit portion in accordance with an output from the comparison circuit; and
a display control circuit for controlling the control signal from the signal generation circuit and the image signal outputted from the selection circuit to the driver circuit portion in accordance with the output from the comparison circuit,
wherein a first gate of the first transistor is electrically connected to a scan line, one of a first source and a first drain of the first transistor is electrically connected to a signal line, and the other of the first source and the first drain of the first transistor is electrically connected to a second gate of the second transistor,
wherein one of a second source and a second drain of the second transistor is electrically connected to a power supply line and the other of the second source and the second drain of the second transistor is electrically connected to one of the pair of electrodes of the light-emitting element,
wherein the first transistor comprises a first oxide semiconductor layer,
wherein a node between the second gate and the other of the first source and the first drain is configured to be supplied with a video signal that is an analog signal,
wherein the node is configured to hold the video signal when the first transistor is off,
wherein a period when the display device displays a still image includes a period when output of a signal to all the scan lines in the pixel portion is stopped,
wherein a carrier concentration of the first oxide semiconductor layer is less than 1×10 14 /cm 3 ,
wherein the first transistor comprises the first oxide semiconductor layer a hydrogen concentration of which is 5×10 19 /cm 3 or less,
wherein the first oxide semiconductor layer comprises indium, gallium, and zinc, and
wherein the first oxide semiconductor layer comprises a microcrystalline portion.

10. The display device according to claim 9 , wherein the plurality of pixels each further comprises a luminous layer.

11. The display device according to claim 9 , wherein a band gap of the first oxide semiconductor layer is 2 eV or more.

12. The display device according to claim 9 , wherein the second transistor comprises a second oxide semiconductor layer a hydrogen concentration of which is 5×10 19 /cm 3 or less.

13. The display device according to claim 9 , wherein the second transistor comprises a polycrystalline silicon layer.

14. An electronic device comprising the display device according to claim 9 .

15. The electronic device according to claim 14 , wherein the electronic device is an electronic paper comprising operation keys.

16. The display device according to claim 9 , wherein the display control circuit is configured so as not to output the control signal to the driver circuit portion in accordance with the output from the comparison circuit.

17. The display device according to claim 9 , wherein the control signal is a high power supply potential, a low power supply potential, a clock signal, a s

Assignees

• Takahashi Kei
• Yamazaki Shunpei
• Semiconductor Energy Lab

Inventors

• Takahashi Kei
• Yamazaki Shunpei

Classifications

• G09G2310/0286

  Details of a shift registers arranged for use in a driving circuit · CPC title

• G09G2310/08

  Details of timing specific for flat panels, other than clock recovery · CPC title

• G09G3/3233 Primary

  with pixel circuitry controlling the current through the light-emitting element · CPC title

• G09G3/3266

  Details of drivers for scan electrodes · CPC title

• G09G2300/0842

  forming a memory circuit, e.g. a dynamic memory with one capacitor · CPC title