Memory module and operation method thereof

US9519544B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9519544-B2
Application numberUS-201414489064-A
CountryUS
Kind codeB2
Filing dateSep 17, 2014
Priority dateMay 19, 2014
Publication dateDec 13, 2016
Grant dateDec 13, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A memory module includes an emergency power supply block, a volatile memory, a nonvolatile memory, and a control block configured to control data of the volatile memory to be backed up in the nonvolatile memory, by using a power supplied from the emergency power supply block, upon a power failure, and control the data of the volatile memory to be recovered, by using data backed up in the nonvolatile memory, upon a power recovery, wherein the control block controls the data of the volatile memory not to be backed up while controlling the data of the volatile memory to be recovered, even upon the power failure.

First claim

Opening claim text (preview).

What is claimed is: 1. A memory module comprising: an emergency power supply block; a volatile memory; a nonvolatile memory; and a control block suitable for controlling data of the volatile memory to be backed up in the nonvolatile memory, by using a power of the emergency power supply block, upon a power failure, and controlling the data of the volatile memory to be recovered, by using data backed up in the nonvolatile memory, upon a power recovery, wherein, after recovery of the data of the volatile memory is completed, a plurality of memory blocks in the nonvolatile memory are sequentially erased, and wherein, when the power failure occurs while the plurality of memory blocks in the nonvolatile memory are sequentially erased, recovered data of the volatile memory are backed up in memory blocks completely erased among the plurality of memory blocks. 2. The memory module according to claim 1 , wherein, when the power failure occurs while the plurality of memory blocks in the nonvolatile memory are sequentially erased, the other memory blocks which are not erased among the plurality of memory blocks retain data backed up therein. 3. An operation method of a memory module including a volatile memory and a nonvolatile memory, the method comprising: sensing a failure in a host power; converting a power of the memory module, from the host power to an emergency power; backing up data of the volatile memory in the nonvolatile memory; recovering the host power; recovering the data of the volatile memory by using data backed up in the nonvolatile memory; erasing sequentially a plurality of memory blocks in the nonvolatile memory after the recovering of the data of the volatile memory; and backing up recovered data of the volatile memory in memory blocks completely erased among the plurality of memory blocks, when the power failure occurs in the erasing of the plurality of memory blocks. 4. The operation method according to claim 3 , wherein, in the backing up of the data of the volatile memory in the memory blocks completely erased, the other memory blocks which are not erased among the plurality of memory blocks retain data backed up therein.

Assignees

Inventors

Classifications

  • Power supply arrangements {, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels} · CPC title

  • Migration mechanisms · CPC title

  • Redundant storage or storage space (G06F11/2056 takes precedence) · CPC title

  • Battery and back-up supplies · CPC title

  • Supports for storage elements {, e.g. memory modules}; Mounting or fixing of storage elements on such supports · CPC title

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Frequently asked questions

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What does patent US9519544B2 cover?
A memory module includes an emergency power supply block, a volatile memory, a nonvolatile memory, and a control block configured to control data of the volatile memory to be backed up in the nonvolatile memory, by using a power supplied from the emergency power supply block, upon a power failure, and control the data of the volatile memory to be recovered, by using data backed up in the nonvol…
Who is the assignee on this patent?
Sk Hynix Inc
What technology area does this patent fall under?
Primary CPC classification G06F11/1441. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Dec 13 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).