Wiring substrate and method for manufacturing wiring substrate

Patent metadata

Field	Value
Publication number	US-9516753-B2
Application number	US-201314031209-A
Country	US
Kind code	B2
Filing date	Sep 19, 2013
Priority date	Oct 5, 2012
Publication date	Dec 6, 2016
Grant date	Dec 6, 2016

Abstract

A method for manufacturing a wiring substrate includes forming a through-hole penetrating a core layer from one to another surface of the core layer, forming a first metal layer covering the one and the other surface of the core layer and an inner wall surface of the through-hole, forming a second metal layer on the first metal layer, and forming a patterned third metal layer on the second metal layer toward the one surface of the core layer along with forming a patterned fourth metal layer on the second metal layer toward the other surface of the core layer. The forming of the second metal layer includes covering the one and the other surfaces of the core layer and the first metal layer in the through-hole with the second metal layer and closing up a center part of the through-hole with the second metal layer.

First claim

What is claimed is:

1. A wiring substrate comprising:
a core layer having one surface and another surface and including a through-hole penetrating the core layer from the one surface to the other surface of the core layer, wherein an inner wall surface of the through-hole extends continuously from the one surface of the core layer to the other surface of the core layer;
a first metal layer formed directly on the inner wall surface of the through-hole, the first metal layer covering the entire inner wall surface of the through-hole and continuously extending from the one surface of the core layer to the other surface of the core layer;
a second metal layer formed on the first metal layer;
a third metal layer formed on the second metal layer toward the one surface of the core layer;
a fourth metal layer formed on the second metal layer toward the other surface of the core layer;
a first wiring layer formed toward the one surface of the core layer and including a first part of the first metal layer, a first part of the second metal layer, and the third metal layer that are formed toward the one surface of the core layer;
a second wiring layer formed toward the other surface of the core layer and including a second part of the first metal layer, a second part of the second metal layer, and the fourth metal layer that are formed toward the other surface of the core layer; and
a through-wiring formed in the through-hole and including a third part of the first metal layer, a third part of the second metal layer, a part of the third metal layer, and a part of the fourth metal layer that are formed in the through-hole;
wherein, among the first, second, third, and fourth metal layers, only the first metal layer and the second metal layer are formed in a narrowest part of the through-hole,
wherein the core layer and the inner wall surface of the through-hole are formed of an insulating resin,
wherein the second metal layer covers the first metal layer in the through-hole and closes up the narrowest part of the through-hole,
wherein a thickness of a part of the third metal layer that is formed on top of the one surface of the core layer is greater than a thickness of a part of the second metal layer that is formed on top of the one surface of the core layer, and
wherein a thickness of a part of the fourth metal layer that is formed on top of the other surface of the core layer is greater than a thickness of a part of the second metal layer that is formed on top of the other surface of the core layer.

2. The wiring substrate as claimed in claim 1 ,
wherein the through-hole includes a first hole and a second hole,
wherein each of the first and second holes has a circular truncated shape,
wherein the first hole includes a first opening part toward the one surface of the core layer and a first peak part in the core layer, the first opening part having an area larger than an area of the first peak part,
wherein the second hole includes a second opening part toward the other surface of the core layer and a second peak part in the core layer, the second opening part having an area larger than an area of the second peak part,
wherein the first peak part and the second peak part are formed in communication with each other in the core layer.

3. The wiring substrate as claimed in claim 1 ,
wherein the one surface of the core layer has a first metal foil formed thereon,
wherein the other surface of the core layer has a second metal foil formed thereon,
wherein the through-hole penetrates the first metal foil, the core layer, and the second metal foil,
wherein the first metal layer is formed on the first and second metal foils,
wherein the first wiring layer further includes a part of the first metal foil formed toward the one surface of the core layer,
wherein the second wiring layer further includes a part of the second metal foil formed toward the other surface of the core layer.

4. The wiring substrate as claimed in claim 3 ,
wherein a part of the one surface of the core layer that is exposed from the first metal foil has an annular shape, and
wherein a part of the other surface of the core layer that is exposed from the second metal foil has an annular shape.

5. The wiring substrate as claimed in claim 4 , wherein the first metal layer is provided to cover the exposed part of the one surface of the core layer and the exposed part of the other surface of the core layer.

6. The wiring substrate as claimed in claim 3 , wherein an oxide film having a roughened surface is formed on a surface of the first metal foil and a surface of the second metal foil.

7. The wiring substrate as claimed in claim 1 ,
wherein the through-hole includes a first recess part having an opening toward the one surface of the core layer and a second recess part having an opening toward the other surface of the core layer,
wherein the second metal layer closing up the narrowest part of the through-hole serves as a bottom part of each of the first and second recess parts,
wherein the third metal layer fills the first recess part,
wherein the fourth metal layer fills the second recess part.

8. The wiring substrate as claimed in claim 1 , wherein the core layer includes an insulating resin impregnated in a woven or non-woven fiber.

9. The wiring substrate as claimed in claim 1 ,
wherein the each of the second metal layer, the third metal layer, and the fourth metal layer has a first surface and a second surface,
wherein a distance between the first surface and the second surface of the second metal layer is a thickness of the second metal layer,
wherein a distance between the first surface and the second surface of the third metal layer is a thickness of the third metal layer,
wherein a distance between the first surface and the second surface of the fourth metal layer is a thickness of the fourth metal layer,
wherein each of the third metal layer and the fourth metal layer has a layered part that is parallel to the one surface and the another surface of the core layer and orthogonal to a central axis of the through-hole,
wherein each of the thicknesses of the third metal layer and the fourth metal layer is greater than the thickness of the second metal layer at least at the layered part.

10. A wiring substrate comprising:
a core layer having one surface and another surface and including a through-hole penetrating the core layer from the one surface to the other surface of the core layer, wherein an inner wall surface of the through-hole extends continuously from the one surface of the core layer to the other surface of the core layer;
a first metal layer formed directly on the inner wall surface of the through-hole, the first metal layer covering the entire inner wall surface of the through-hole and continuously extending from the one surface of the core layer to the other surface of the core layer;
a second metal layer formed on the first metal layer;
a third metal layer formed on the second metal layer toward the one surface of the core layer;
a fourth metal layer formed on the second metal layer toward the other surface of the core layer;
a first wiring layer formed toward the one surface of the core layer and including a first part of the first metal layer, a first part of the second metal layer, and the third metal layer that are formed toward the one surface of the core layer;
a second wiring layer formed toward the other surface of the core layer and including a second part of the first metal layer, a second part of the second metal layer, and the fourth metal layer that are formed toward the other surface of the core layer; and
a through-wiring formed in the through-hole and including a third part of th

Assignees

• Shinko Electric Ind Co

Inventors

• Hara Koichi
• Yoda Toshihisa

Classifications

• H10W90/734

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/724

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W74/15

  on active surfaces of flip-chip devices, e.g. underfills · CPC title

• H10W72/241

  Dispositions, e.g. layouts · CPC title

• H10W72/072

  of bump connectors · CPC title