Receiver and voltage controlled oscillator

US9515684B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9515684-B2
Application numberUS-201514971086-A
CountryUS
Kind codeB2
Filing dateDec 16, 2015
Priority dateDec 16, 2014
Publication dateDec 6, 2016
Grant dateDec 6, 2016

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  1. Title

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  2. Abstract

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  4. Key dates

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  5. First independent claim

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Abstract

Official abstract text for this publication.

According to an embodiment, a receiver includes a voltage controlled oscillator, a frequency-to-digital converter and an input sensitivity controller. In the voltage controlled oscillator, input sensitivity relative to a baseband signal is controlled based on an input sensitivity control signal. The voltage controlled oscillator oscillates at a frequency controlled by a voltage of the baseband signal to generate an oscillation signal. The frequency-to-digital converter performs frequency-to-digital conversion of the oscillation signal to generate a digital signal. The input sensitivity controller generates the input sensitivity control signal based on the digital signal.

First claim

Opening claim text (preview).

What is claimed is: 1. A receiver comprising: a voltage controlled oscillator in which input sensitivity relative to a baseband signal is controlled based on an input sensitivity control signal, and that oscillates at a frequency controlled by a voltage of the baseband signal to generate an oscillation signal; a frequency-to-digital converter that performs frequency-to-digital conversion of the oscillation signal to generate a digital signal; and an input sensitivity controller that generates the input sensitivity control signal based on the digital signal. 2. The receiver according to claim 1 , wherein the input sensitivity controller compares a mean-square code of the digital signal with at least one threshold, and generates the input sensitivity control signal based on a comparison result. 3. The receiver according to claim 2 , wherein when the mean-square code of the digital signal exceeds a first threshold, or falls below a second threshold that is smaller than the first threshold, the input sensitivity controller generates the input sensitivity control signal to decrease the input sensitivity. 4. The receiver according to claim 1 , wherein the input sensitivity controller generates the input sensitivity control signal to decrease the input sensitivity when detecting clipping of the digital signal. 5. The receiver according to claim 1 , further comprising: a low noise amplifier that performs low noise amplification of a radio frequency signal to generate an amplified signal; a mixer that multiplies the amplified signal by the oscillation signal to generate a product signal; a low-pass filter that suppresses a high frequency component in the product signal to generate the baseband signal; and a loop gain controller that generates a frequency control signal corresponding to an inverse phase signal of the baseband signal by using the digital signal, wherein the voltage controlled oscillator controls a frequency of the oscillation signal by the frequency control signal in addition to the voltage of the baseband signal. 6. The receiver according to claim 1 , wherein the voltage controlled oscillator comprises: a plurality of varactor diodes; and a plurality of switches that switches voltages to be applied to the plurality of varactor diodes in accordance with the input sensitivity control signal. 7. The receiver according to claim 6 , wherein the plurality of switches respectively select the baseband signal or a DC component of the baseband signal in accordance with the input sensitivity control signal, and supply the selected signals to one ends of the plurality of varactor diodes. 8. The receiver according to claim 1 , wherein the voltage controlled oscillator oscillates at a fixed frequency regardless of the input sensitivity if a voltage of the baseband signal equals a predetermined voltage value.

Assignees

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Classifications

  • Circuits · CPC title

  • with semiconductor devices only · CPC title

  • H04B1/0007Primary

    wherein the AD/DA conversion occurs at radiofrequency or intermediate frequency stage · CPC title

  • and comprising a voltage sensitive element, e.g. varactor · CPC title

  • the amplifier being a low noise amplifier [LNA] · CPC title

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What does patent US9515684B2 cover?
According to an embodiment, a receiver includes a voltage controlled oscillator, a frequency-to-digital converter and an input sensitivity controller. In the voltage controlled oscillator, input sensitivity relative to a baseband signal is controlled based on an input sensitivity control signal. The voltage controlled oscillator oscillates at a frequency controlled by a voltage of the baseband …
Who is the assignee on this patent?
Toshiba Kk
What technology area does this patent fall under?
Primary CPC classification H04B1/0007. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 06 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).