Voltage compensation circuit and control method thereof

Patent metadata

Field	Value
Publication number	US-9515544-B2
Application number	US-201414161516-A
Country	US
Kind code	B2
Filing date	Jan 22, 2014
Priority date	Oct 23, 2013
Publication date	Dec 6, 2016
Grant date	Dec 6, 2016

Abstract

A voltage compensation circuit and a control method thereof dynamically compensate a voltage drop caused by supplying power from a first power line to a function circuit. The voltage compensation circuit includes an amplifier, a detection module and a boosting module. The amplifier has an inverting input end coupled to the first power line and the function circuit to be supplied with a load voltage supplying to the function circuit, a non-inverting input end for being supplied with a reference voltage, and an output end coupled to the detection module to output a comparison signal. The boosting module is coupled between the detection module and the inverting input end of the amplifier. The detection module generates compensation voltage information according to the comparison signal. The boosting module outputs the compensation voltage to the inverting input end of the amplifier according to the compensation voltage information.

First claim

What is claimed is:

1. A voltage compensation circuit for dynamically compensating a voltage drop caused by supplying power from a first power line to a function circuit coupled between the first power line and a second power line, comprising:
a first amplifier having an inverting input end coupled to the first power line and the function circuit to be supplied with a load voltage supplied to the function circuit, a non-inverting input end of which is supplied with a reference voltage, and an output end of which for outputting a first comparison signal generated by comparing the load voltage with the reference voltage;
a detection module coupled to the output end of the first amplifier, for generating compensation voltage information according to the first comparison signal; and
a boosting module coupled between the detection module and the inverting input end of the first amplifier, for generating a compensation voltage according to the compensation voltage information and supplying the compensation voltage to the inverting input end of the first amplifier, where an input voltage of the function circuit is equal to a combination of the load voltage and the compensation voltage.

2. The voltage compensation circuit according to claim 1 , wherein the first amplifier is an error amplifier for amplifying a difference between the load voltage and the reference voltage to generate the first comparison signal.

3. The voltage compensation circuit according to claim 1 , wherein the voltage compensation circuit further comprises a clamping switch having an input end and output end through which the clamping switch is coupled between the first power line and the function circuit, and having a control end coupled to a negative power end of the first amplifier, and the clamping switch is configured to disable the first amplifier when the function circuit stops operating.

4. The voltage compensation circuit according to claim 1 , wherein the voltage compensation circuit further comprises:
a second amplifier having a non-inverting input end coupled to the function circuit and the second power line, an inverting input end for being supplied with the reference voltage, and an output end for outputting a second comparison signal generated by comparing a voltage on the second power line with the reference voltage; and
an adder coupled to the output end of the first amplifier, the output end of the second amplifier and the detection module, for performing either addition or subtraction on the first comparison signal and the second comparison signal to generate the compensation voltage information.

5. The voltage compensation circuit according to claim 4 , wherein a positive power end of the first amplifier couples to a positive power end of the second amplifier, and the voltage compensation circuit further comprises:
a first clamping switch having an input end and output end via which the first clamping switch is coupled between the first power line and the function circuit, and a control end which is coupled to a negative power end of the first amplifier, so as to disable the first amplifier when the function circuit stops operating; and
a second clamping switch having an input end and output end via which the second clamping switch is coupled to the non-inverting input end of the first amplifier and a loop supplying the reference voltage, and a control end which is coupled to the positive power end of the first amplifier and the positive power end of the second amplifier, wherein the output of the second clamping switch is blocked when the first amplifier is disabled.

6. The voltage compensation circuit according to claim 1 , wherein the voltage compensation circuit is applicable to a chip comprising the function circuit and a plurality of first conductive wires, four of the first conductive wires form a power ring, the other first conductive wires are paralleled and coupled to two opposite first conductive wires of the power ring in parallel, and the first power line is one of the other first conductive wires.

7. The voltage compensation circuit according to claim 6 , wherein the chip further comprises a plurality of second conductive wires, two of the second conductive wires couple to the power ring and are crisscross at the center of the power ring, the other second conductive wires symmetrically couple to the other first conductive wires in the power ring around the center of the power ring, and a voltage on each of the second conductive wires is substantially equal to a voltage on the power ring and serves as the reference voltage.

8. The voltage compensation circuit according to claim 1 , wherein the boosting module comprises:
a first transmission gate having an input end for being supplied with the load voltage, and comprising a N type transistor having a control end for receiving a first clock signal, and a P type transistor having a control end for receiving a second clock signal;
a second transmission gate having an input end coupled to an output end of the first transmission gate, and comprising a N type transistor having a control end for receiving the second clock signal, and a P type transistor having a control end for receiving the first clock signal;
a first capacitor having one end coupled to the detection module, and the other end coupled to the output end of the first transmission gate and the input end of the second transmission gate;
a third transmission gate having an input end for being supplied with the load voltage, and comprising a N type transistor having a control end for receiving the second clock signal, and a P type transistor having a control end for receiving the first clock signal;
a fourth transmission gate, having an input end which is coupled to an output end of the third transmission gate, and comprising a N type transistor having a control end for receiving the first clock signal, and a P type transistor having a control end for receiving the second clock signal; and
a second capacitor having one end coupled to the detection module, and the other end coupled to the output end of the third transmission gate and the input end of the fourth transmission gate;
wherein the first clock signal is generated by inverting the second clock signal, and the boosting module, according to the first clock signal and the second clock signal, either enables the first transmission gate and the fourth transmission gate and disables the second transmission gate and the third transmission gate, or disables the first transmission gate and the fourth transmission gate and enables the second transmission gate and the third transmission gate, so as to provide the compensation voltage via the first capacitor and the second capacitor alternately and output the compensation voltage via the output end of the second transmission gate or the output end of the fourth transmission gate.

9. The voltage compensation circuit according to claim 8 , wherein the boosting module further comprises:
a fifth transmission gate having an input end coupled to the output end of the first transmission gate, the input end of the second transmission gate and the first capacitor and an output end coupled to the inverting input end of the first amplifier, and comprising a N type transistor having a control end for receiving the second clock signal, and a P type transistor having a control end for receiving the first clock signal; and
a sixth transmission gate having an input end coupled to the output end of the third transmission gate, the input end of the fourth transmission gate and the second capacitor and an output end coupled to the inverting input end of the first amplifier, and comprising a N type transistor having a control end for receiving the first clock s

Assignees

• Ind Tech Res Inst

Inventors

• Lin Keng-Yu
• Tang Wei-Xiang
• Huang Po-Han

Classifications

• G05F1/46 Primary

  wherein the variable actually regulated by the final control device is DC (G05F1/625 takes precedence) · CPC title

• H02J1/00

  Circuit arrangements for DC mains or DC distribution networks · CPC title

• H02M1/08 Primary

  Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters · CPC title

• H02M3/07

  using capacitors charged and discharged alternately by semiconductor devices with control electrode {, e.g. charge pumps} · CPC title