Conclusive write operation dispersed storage network frame

US9514090B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9514090-B2
Application numberUS-201414148380-A
CountryUS
Kind codeB2
Filing dateJan 6, 2014
Priority dateApr 26, 2010
Publication dateDec 6, 2016
Grant dateDec 6, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method begins by a processing module generating a payload of a dispersed storage network frame regarding a conclusive write request operation by generating one or more slice name fields of a payload to include one or more slice names corresponding to one or more write commit responses of a write request operation, wherein the conclusive write request operation is a conclusive phase of the write request operation. The method continues with the processing module generating one or more slice revision numbering fields of the payload, wherein each slice revision numbering field includes a slice revision number corresponding to an associated slice name of the one or more slice names. The method continues with the processing module generating a protocol header of the DSN frame by generating a payload length field of the protocol header to include a payload length and generating remaining fields of the protocol header.

First claim

Opening claim text (preview).

What is claimed is: 1. One or more memory devices comprises: a first memory section storing operational instructions that, when executed by a computing device, causes the computing device to: generating a payload of a dispersed storage network (DSN) frame regarding a conclusive write request operation by: generating one or more slice name fields of the payload to include one or more slice names corresponding to one or more write commit responses of a write request operation, wherein the conclusive write request operation is a conclusive phase of the write request operation; and generating one or more slice revision numbering fields of the payload, wherein each slice revision numbering field includes a slice revision number corresponding to an associated slice name of the one or more slice names; a second memory section storing operational instructions that, when executed by the computing device, causes the computing device to: generate a protocol header of the DSN frame by: generating a payload length field of the protocol header to include a payload length that represents length of the one or more slice name fields and length the one or more slice revision numbering fields; and generating remaining fields of the protocol header; and a third memory section storing operational instructions that, when executed by the computing device, causes the computing device to: output, to a storage unit of the DSN, the DSN frame in order of the protocol header and one or more slice field pairs, wherein each of the one or more slice field pairs includes, in order, a slice name field of the one or more slice name fields and a slice revision numbering field of the one or more slice revision numbering fields, wherein the slice revision numbering field is associated with the slice name field. 2. The one or more memory devices of claim 1 , wherein the second memory section further stores operational instructions that, when executed by the computing device, causes the computing device to generate remaining fields of the protocol header by at least one of: generating an operation code field to indicate a finalize write request operation when a threshold number of the one or more write commit responses have been received; generating a protocol class field to indicate a protocol class for the finalize write request operation when the threshold number of the one or more write commit responses have been received; and generating a protocol class version field to indicate a protocol class version for the finalize write request operation when the threshold number of the one or more write commit responses have been received. 3. The one or more memory devices of claim 1 , wherein the second memory section further stores operational instructions that, when executed by the computing device, causes the computing device to generate remaining fields of the protocol header by at least one of: generating an operation code field to indicate an undo write request operation when a threshold number of the one or more write commit responses have not been received; generating a protocol class field to indicate a protocol class for the undo write request operation when the threshold number of the one or more write commit responses have not been received; and generating a protocol class version field to indicate a protocol class version for the undo write request operation when the threshold number of the one or more write commit responses have not been received. 4. The one or more memory devices of claim 1 , wherein the first memory section further stores operational instructions that, when executed by the computing device, causes the computing device to generate the one or more slice names by at least one of: receiving the one or more slice names; and selecting the one or more slice names from a slice names list.

Assignees

Inventors

Classifications

  • Parity data used in redundant arrays of independent storages, e.g. in RAID systems · CPC title

  • in relation to data integrity, e.g. data losses, bit errors · CPC title

  • Management of blocks · CPC title

  • Replication mechanisms · CPC title

  • Distributed or networked storage systems, e.g. storage area networks [SAN], network attached storage [NAS] · CPC title

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What does patent US9514090B2 cover?
A method begins by a processing module generating a payload of a dispersed storage network frame regarding a conclusive write request operation by generating one or more slice name fields of a payload to include one or more slice names corresponding to one or more write commit responses of a write request operation, wherein the conclusive write request operation is a conclusive phase of the wri…
Who is the assignee on this patent?
Cleversafe Inc, IBM
What technology area does this patent fall under?
Primary CPC classification G06F15/167. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Dec 06 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).